Inventor · disambiguated record
Nicole Saulnier
Also filed as: SAULNIER NICOLE · SAULNIER NICOLE A · SAULNIER NICOLE ADELLE
60 granted patents·5 pending applications·158 citations·filing 2014–2024
98Inventor score
Top patents by PatentIndex Score
65 records- 0198US10741756B1Phase change memory with a patterning scheme for tantalum nitride and silicon nitride layersIBM·Filed 2019·Granted Aug 11, 2020·15 cites·20 claims
- 0298US9934970B1Self aligned pattern formation post spacer etchback in tight pitch configurationsIBM·Filed 2017·Granted Apr 3, 2018·22 cites·13 claims
- 0397US9991156B2Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogsIBM·Filed 2016·Granted Jun 5, 2018·15 cites·6 claims
- 0496US9779944B1Method and structure for cut material selectionIBM·Filed 2016·Granted Oct 3, 2017·17 cites·19 claims
- 0595US11456415B2Phase change memory cell with a wrap around and ring type of electrode contact and a projection linerIBM·Filed 2020·Granted Sep 27, 2022·4 cites·20 claims
- 0695US10229854B1FinFET gate cut after dummy gate removalIBM·Filed 2017·Granted Mar 12, 2019·11 cites·11 claims
- 0794US11930724B2Phase change memory cell spacerIBM·Filed 2021·Granted Mar 12, 2024·2 cites·13 claims
- 0893US11621394B2Multi-layer phase change memory deviceIBM·Filed 2020·Granted Apr 4, 2023·2 cites·25 claims
- 0993US10529569B2Self aligned pattern formation post spacer etchback in tight pitch configurationsIBM·Filed 2018·Granted Jan 7, 2020·5 cites·11 claims
- 1092US9607886B1Self aligned conductive lines with relaxed overlayIBM·Filed 2016·Granted Mar 28, 2017·6 cites·20 claims
- 1191USRE50613EFinFET gate cut after dummy gate removalADEIA SEMICONDUCTOR SOLUTIONS LLC·Filed 2022·Granted Sep 30, 2025·1 cites·38 claims
- 1290US11476418B2Phase change memory cell with a projection linerIBM·Filed 2020·Granted Oct 18, 2022·2 cites·14 claims
- 1390US11456417B2Integrated phase change memory cell projection liner and etch stop layerIBM·Filed 2020·Granted Sep 27, 2022·2 cites·15 claims
- 1489US9786554B1Self aligned conductive linesIBM·Filed 2016·Granted Oct 10, 2017·5 cites·7 claims
- 1589US2025062126A1Self aligned pattern formation post spacer etchback in tight pitch configurationsTESSERA LLC·Filed 2024·Application pending·0 cites
- 1688US11670510B2Self aligned pattern formation post spacer etchback in tight pitch configurationsTESSERA LLC·Filed 2021·Granted Jun 6, 2023·1 cites·18 claims
- 1788US9773700B1Aligning conductive vias with trenchesIBM·Filed 2016·Granted Sep 26, 2017·5 cites·9 claims
- 1887US10546774B2Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogsIBM·Filed 2018·Granted Jan 28, 2020·3 cites·9 claims
- 1987US10249533B1Method and structure for forming a replacement contactIBM·Filed 2018·Granted Apr 2, 2019·6 cites·20 claims
- 2087US9391020B2Interconnect structure having large self-aligned viasST MICROELECTRONICS INC·Filed 2014·Granted Jul 12, 2016·7 cites·18 claims
- 2184US12106963B2Self aligned pattern formation post spacer etchback in tight pitch configurationsTESSERA LLC·Filed 2023·Granted Oct 1, 2024·0 cites·21 claims
- 2284US10121661B2Self aligned pattern formation post spacer etchback in tight pitch configurationsIBM·Filed 2017·Granted Nov 6, 2018·2 cites·17 claims
- 2384US9711507B1Separate N and P fin etching for reduced CMOS device leakageIBM·Filed 2016·Granted Jul 18, 2017·3 cites·14 claims
- 2483US11024715B2FinFET gate cut after dummy gate removalTESSERA INC·Filed 2020·Granted Jun 1, 2021·1 cites·20 claims
- 2582US10833267B2Structure and method to form phase change memory cell with self- align top electrode contactIBM·Filed 2018·Granted Nov 10, 2020·3 cites·10 claims
- 2682US10573808B1Phase change memory with a dielectric bi-layerIBM·Filed 2018·Granted Feb 25, 2020·3 cites·20 claims
- 2781US9659820B2Interconnect structure having large self-aligned viasIBM·Filed 2016·Granted May 23, 2017·3 cites·9 claims
- 2879US10515894B2Enhanced self-alignment of vias for a semiconductor deviceIBM·Filed 2018·Granted Dec 24, 2019·2 cites·6 claims
- 2979US10056290B2Self-aligned pattern formation for a semiconductor deviceIBM·Filed 2016·Granted Aug 21, 2018·2 cites·12 claims
- 3077US10957583B2Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogsIBM·Filed 2019·Granted Mar 23, 2021·1 cites·19 claims
- 3176US11889773B2Multi-layer phase change memory deviceIBM·Filed 2023·Granted Jan 30, 2024·0 cites·20 claims
- 3276US10725454B2Mask process aware calibration using mask pattern fidelity inspectionsIBM·Filed 2018·Granted Jul 28, 2020·1 cites·20 claims
- 3376US9852946B1Self aligned conductive linesIBM·Filed 2016·Granted Dec 26, 2017·2 cites·20 claims
- 3473US9911647B2Self aligned conductive linesIBM·Filed 2017·Granted Mar 6, 2018·1 cites·20 claims
- 3571US10937961B2Structure and method to form bi-layer composite phase-change-memory cellIBM·Filed 2018·Granted Mar 2, 2021·1 cites·23 claims
- 3670US10903418B2Low resistance electrode for high aspect ratio confined PCM cell in BEOLIBM·Filed 2018·Granted Jan 26, 2021·1 cites·13 claims
- 3768US10211151B2Enhanced self-alignment of vias for asemiconductor deviceIBM·Filed 2016·Granted Feb 19, 2019·1 cites·13 claims
- 3867US11018007B2Self aligned pattern formation post spacer etchback in tight pitch configurationsTESSERA INC·Filed 2019·Granted May 25, 2021·0 cites·20 claims
- 3963US10600868B2FinFET gate cut after dummy gate removalTESSERA INC·Filed 2019·Granted Mar 24, 2020·0 cites·19 claims
- 4062US11646221B2Self-aligned pattern formation for a semiconductor deviceIBM·Filed 2019·Granted May 9, 2023·0 cites·17 claims
- 4162US10395985B2Self aligned conductive lines with relaxed overlayIBM·Filed 2018·Granted Aug 27, 2019·0 cites·19 claims
- 4260US10622250B2Dielectric gap fill evaluation for integrated circuitsIBM·Filed 2019·Granted Apr 14, 2020·0 cites·20 claims
- 4358US11800817B2Phase change memory cell galvanic corrosion preventionIBM·Filed 2021·Granted Oct 24, 2023·0 cites·11 claims
- 4458US11227793B2Self-aligned pattern formation for a semiconductor deviceIBM·Filed 2018·Granted Jan 18, 2022·0 cites·12 claims
- 4558US11043494B2Structure and method for equal substrate to channel height between N and P fin-FETsIBM·Filed 2019·Granted Jun 22, 2021·0 cites·19 claims
- 4658US11022891B2Photoresist bridging defect removal by reverse tone weak developerIBM·Filed 2017·Granted Jun 1, 2021·0 cites·2 claims
- 4758US10083864B2Self aligned conductive lines with relaxed overlayIBM·Filed 2017·Granted Sep 25, 2018·0 cites·11 claims
- 4856US11956975B2BEOL fat wire level ground rule compatible embedded artificial intelligence integrationIBM·Filed 2021·Granted Apr 9, 2024·0 cites·20 claims
- 4956US11022890B2Photoresist bridging defect removal by reverse tone weak developerIBM·Filed 2017·Granted Jun 1, 2021·0 cites·6 claims
- 5056US10312140B1Dielectric gap fill evaluation for integrated circuitsIBM·Filed 2017·Granted Jun 4, 2019·0 cites·12 claims
Showing the top 50 of 65 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →