Inventor · disambiguated record
Hillery C. Hunter
Also filed as: HUNTER HILLERY · HUNTER HILLERY C
82 granted patents·4 pending applications·495 citations·filing 2003–2021
99Inventor score
Top patents by PatentIndex Score
86 records- 0198US9418721B2Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)IBM·Filed 2014·Granted Aug 16, 2016·52 cites·11 claims
- 0297US9431084B2Determining and storing bit error rate relationships in spin transfer torque magnetoresistive random-access memory (STT-MRAM)IBM·Filed 2014·Granted Aug 30, 2016·34 cites·15 claims
- 0397US9351899B2Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM)IBM·Filed 2014·Granted May 31, 2016·27 cites·17 claims
- 0496US9471423B1Selective memory error reportingIBM·Filed 2015·Granted Oct 18, 2016·25 cites·2 claims
- 0596US7948817B2Advanced memory device having reduced power and improved performanceIBM·Filed 2009·Granted May 24, 2011·51 cites·6 claims
- 0695US10379784B1Write management for increasing non-volatile memory reliabilityIBM·Filed 2018·Granted Aug 13, 2019·18 cites·20 claims
- 0794US9760504B2Nonvolatile memory data securityIBM·Filed 2015·Granted Sep 12, 2017·11 cites·12 claims
- 0894US8659959B2Advanced memory device having improved performance, reduced power and increased reliabilityKIM KYU-HYOUN·Filed 2012·Granted Feb 25, 2014·16 cites·5 claims
- 0994US8307270B2Advanced memory device having improved performance, reduced power and increased reliabilityKIM KYU-HYOUN·Filed 2009·Granted Nov 6, 2012·27 cites·7 claims
- 1093US9747148B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2017·Granted Aug 29, 2017·7 cites·9 claims
- 1192US9087612B2DRAM error detection, evaluation, and correctionIBM·Filed 2013·Granted Jul 21, 2015·14 cites·4 claims
- 1291US10019312B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2017·Granted Jul 10, 2018·7 cites·11 claims
- 1389US9734885B1Thermal-aware memoryIBM·Filed 2016·Granted Aug 15, 2017·9 cites·20 claims
- 1489US9256371B2Implementing reinforcement learning based flash controlGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 9, 2016·12 cites·16 claims
- 1588US9898218B2Memory system with switchable operating bandsIBM·Filed 2016·Granted Feb 20, 2018·5 cites·19 claims
- 1688US9761294B1Thermal-aware memoryIBM·Filed 2016·Granted Sep 12, 2017·9 cites·20 claims
- 1788US9442512B1Interface clock frequency switching using a computed insertion delayIBM·Filed 2015·Granted Sep 13, 2016·6 cites·17 claims
- 1887US9606851B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2015·Granted Mar 28, 2017·4 cites·15 claims
- 1987US9298395B2Memory system connectorIBM·Filed 2012·Granted Mar 29, 2016·10 cites·17 claims
- 2086US9940457B2Detecting a cryogenic attack on a memory device with embedded error correctionIBM·Filed 2015·Granted Apr 10, 2018·5 cites·17 claims
- 2186US9626242B2Memory device error history bitIBM·Filed 2015·Granted Apr 18, 2017·4 cites·9 claims
- 2285US9690649B2Memory device error history bitIBM·Filed 2015·Granted Jun 27, 2017·4 cites·12 claims
- 2384US10304802B2Integrated wafer-level processing systemIBM·Filed 2016·Granted May 28, 2019·3 cites·4 claims
- 2484US7962695B2Method and system for integrating SRAM and DRAM architecture in set associative cacheIBM·Filed 2007·Granted Jun 14, 2011·14 cites·27 claims
- 2583US9880896B2Error feedback and logging with memory on-chip error checking and correcting (ECC)IBM·Filed 2014·Granted Jan 30, 2018·6 cites·20 claims
- 2681US8848471B2Method for optimizing refresh rate for DRAMFRANCESCHINI MICHELE M·Filed 2012·Granted Sep 30, 2014·7 cites·20 claims
- 2780US8683128B2Memory bus write prioritizationDALY DAVID M·Filed 2010·Granted Mar 25, 2014·5 cites·20 claims
- 2880US8452919B2Advanced memory device having improved performance, reduced power and increased reliabilityKIM KYU-HYOUN·Filed 2012·Granted May 28, 2013·5 cites·9 claims
- 2979US9406368B2Dynamic temperature adjustments in spin transfer torque magnetoresistive random-access memory (STT-MRAM)IBM·Filed 2014·Granted Aug 2, 2016·5 cites·13 claims
- 3079US9146883B2Securing the contents of a memory deviceIBM·Filed 2013·Granted Sep 29, 2015·4 cites·17 claims
- 3179US9058896B2DRAM refreshFRANCESCHINI MICHELE M·Filed 2012·Granted Jun 16, 2015·6 cites·17 claims
- 3279US8898544B2DRAM error detection, evaluation, and correctionIBM·Filed 2012·Granted Nov 25, 2014·5 cites·20 claims
- 3378US9454422B2Error feedback and logging with memory on-chip error checking and correcting (ECC)IBM·Filed 2014·Granted Sep 27, 2016·4 cites·13 claims
- 3478US8615634B2Coordinated writeback of dirty cachelinesDALY DAVID M·Filed 2012·Granted Dec 24, 2013·4 cites·11 claims
- 3577US9734095B2Nonvolatile memory data securityIBM·Filed 2015·Granted Aug 15, 2017·2 cites·12 claims
- 3677US9471422B2Adaptive error correction in a memory systemIBM·Filed 2015·Granted Oct 18, 2016·3 cites·7 claims
- 3776US9146882B2Securing the contents of a memory deviceIBM·Filed 2013·Granted Sep 29, 2015·3 cites·21 claims
- 3876US8705307B2Memory system with dynamic refreshingHENDERSON JOAB D·Filed 2011·Granted Apr 22, 2014·6 cites·20 claims
- 3975US9389972B2Data retrieval from stacked computer memoryIBM·Filed 2014·Granted Jul 12, 2016·3 cites·11 claims
- 4074US9684555B2Selective memory error reportingIBM·Filed 2015·Granted Jun 20, 2017·3 cites·20 claims
- 4174US9218291B2Implementing selective cache injectionIBM·Filed 2013·Granted Dec 22, 2015·2 cites·11 claims
- 4274US9196347B2DRAM controller for variable refresh operation timingIBM·Filed 2013·Granted Nov 24, 2015·3 cites·9 claims
- 4372US8024513B2Method and system for implementing dynamic refresh protocols for DRAM based cacheIBM·Filed 2007·Granted Sep 20, 2011·5 cites·20 claims
- 4471US9740496B2Processor with memory-embedded pipeline for table-driven computationIBM·Filed 2013·Granted Aug 22, 2017·2 cites·13 claims
- 4571US8887014B2Managing errors in a DRAM by weak cell encodingIBM·Filed 2012·Granted Nov 11, 2014·3 cites·6 claims
- 4667US7818624B2Processor bus for performance monitoring with digestsIBM·Filed 2008·Granted Oct 19, 2010·2 cites·31 claims
- 4767US6898261B1Method and apparatus for monitoring event occurrencesIBM·Filed 2003·Granted May 24, 2005·14 cites·30 claims
- 4866US9495242B2Adaptive error correction in a memory systemIBM·Filed 2014·Granted Nov 15, 2016·2 cites·12 claims
- 4966US7409597B2Processor bus for performance monitoring with digestsIBM·Filed 2007·Granted Aug 5, 2008·2 cites·20 claims
- 5065US8108609B2Structure for implementing dynamic refresh protocols for DRAM based cacheBARTH JOHN E·Filed 2008·Granted Jan 31, 2012·5 cites·10 claims
Showing the top 50 of 86 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →