Inventor · disambiguated record
Sundar Iyer
Also filed as: IYER SUNDAR · IYER SUNDAR K · IYER SUNDAR KUMAR
57 granted patents·3 pending applications·1,677 citations·filing 1998–2021
99Inventor score
Top patents by PatentIndex Score
60 records- 0193US8760958B2Methods and apparatus for designing and constructing multi-port memory circuits with voltage assistIYER SUNDAR·Filed 2012·Granted Jun 24, 2014·18 cites·18 claims
- 0293US7657706B2High speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memoryCISCO TECH INC·Filed 2004·Granted Feb 2, 2010·107 cites·6 claims
- 0392US10498608B2Topology explorerCISCO TECH INC·Filed 2017·Granted Dec 3, 2019·9 cites·19 claims
- 0492US7043494B1Fast, deterministic exact match look-ups in large tablesPMC SIERRA INC·Filed 2003·Granted May 9, 2006·129 cites·17 claims
- 0592US6433404B1Electrical fuses for semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 13, 2002·113 cites·18 claims
- 0690US6368902B1Enhanced efuses by the local degradation of the fuse linkIBM·Filed 2000·Granted Apr 9, 2002·77 cites·16 claims
- 0789US10554483B2Network policy analysis for networksCISCO TECH INC·Filed 2017·Granted Feb 4, 2020·8 cites·20 claims
- 0889US10505817B2Automatically determining an optimal amount of time for analyzing a distributed network environmentCISCO TECH INC·Filed 2017·Granted Dec 10, 2019·6 cites·17 claims
- 0989US7362703B1Method for deflection routing of data packets to alleviate link overload in IP networksSPRINT COMMUNICATIONS CO·Filed 2003·Granted Apr 22, 2008·66 cites·18 claims
- 1089US6323535B1Electrical fuses employing reverse biasing to enhance programmingINFINEON TECHNOLOGIES CORP·Filed 2000·Granted Nov 27, 2001·56 cites·16 claims
- 1188US8902672B2Methods and apparatus for designing and constructing multi-port memory circuitsIYER SUNDAR·Filed 2013·Granted Dec 2, 2014·13 cites·7 claims
- 1288US6631466B1Parallel string pattern searches in respective ones of array of nanocomputersPMC SIERRA·Filed 2000·Granted Oct 7, 2003·73 cites·20 claims
- 1388US6429091B1Patterned buried insulatorIBM·Filed 2000·Granted Aug 6, 2002·55 cites·8 claims
- 1487USRE45097EHigh speed memory and input/output processor subsystem for efficiently allocating and using high-speed memory and slower-speed memoryIYER SUNDAR·Filed 2012·Granted Aug 26, 2014·11 cites·21 claims
- 1587US6611875B1Control system for high speed rule processorsPMC SIERRA INC·Filed 1999·Granted Aug 26, 2003·199 cites·12 claims
- 1686US6432760B1Method and structure to reduce the damage associated with programming electrical fusesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 13, 2002·44 cites·8 claims
- 1785US11645131B2Distributed fault code aggregation across application centric dimensionsCISCO TECH INC·Filed 2017·Granted May 9, 2023·5 cites·18 claims
- 1885US10505816B2Semantic analysis to detect shadowing of rules in a model of network intentsCISCO TECH INC·Filed 2017·Granted Dec 10, 2019·5 cites·20 claims
- 1985US6510509B1Method and apparatus for high-speed network rule processingPMC SIERRA US INC·Filed 1999·Granted Jan 21, 2003·166 cites·8 claims
- 2084US10623264B2Policy assurance for service chainingCISCO TECH INC·Filed 2017·Granted Apr 14, 2020·5 cites·20 claims
- 2184US10560328B2Static network policy analysis for networksCISCO TECH INC·Filed 2017·Granted Feb 11, 2020·4 cites·20 claims
- 2284US6972614B2Circuits associated with fusible elements for establishing and detecting of the states of those elementsIBM·Filed 2004·Granted Dec 6, 2005·35 cites·20 claims
- 2383US6691168B1Method and apparatus for high-speed network rule processingPMC SIERRA·Filed 1999·Granted Feb 10, 2004·171 cites·8 claims
- 2482US9520178B2Methods and apparatus for designing and constructing dual write memory circuits with voltage assistCISCO TECH INC·Filed 2015·Granted Dec 13, 2016·5 cites·20 claims
- 2580US8433880B2System and method for storing data in a virtualized high speed memory systemIYER SUNDAR·Filed 2009·Granted Apr 30, 2013·7 cites·14 claims
- 2679US6457061B1Method and apparatus for performing internet network address translationPMC SIERRA·Filed 1998·Granted Sep 24, 2002·129 cites·27 claims
- 2777US11178009B2Static network policy analysis for networksCISCO TECH INC·Filed 2020·Granted Nov 16, 2021·1 cites·20 claims
- 2876US8504796B2System and method for storing data in a virtualized high speed memory system with an integrated memory mapping tableIYER SUNDAR·Filed 2012·Granted Aug 6, 2013·3 cites·18 claims
- 2975US10904101B2Shim layer for extracting and prioritizing underlying rules for modeling network intentsCISCO TECH INC·Filed 2017·Granted Jan 26, 2021·2 cites·20 claims
- 3074US10826788B2Assurance of quality-of-service configurations in a networkCISCO TECH INC·Filed 2017·Granted Nov 3, 2020·2 cites·20 claims
- 3174US6339228B1DRAM cell buried strap leakage measurement structure and methodIBM·Filed 1999·Granted Jan 15, 2002·45 cites·21 claims
- 3273US9293187B2Methods and apparatus for refreshing digital memory circuitsIYER SUNDAR·Filed 2011·Granted Mar 22, 2016·5 cites·21 claims
- 3373US9058860B2Methods and apparatus for synthesizing multi-port memory circuitsIYER SUNDAR·Filed 2012·Granted Jun 16, 2015·4 cites·12 claims
- 3472US9274586B2Intelligent memory interfaceIYER SUNDAR·Filed 2005·Granted Mar 1, 2016·6 cites·12 claims
- 3571US8677072B2System and method for reduced latency cachingIYER SUNDAR·Filed 2010·Granted Mar 18, 2014·3 cites·18 claims
- 3670US10042573B2High speed memory systems and methods for designing hierarchical memory systemsCISCO TECH INC·Filed 2016·Granted Aug 7, 2018·1 cites·20 claims
- 3768US11750463B2Automatically determining an optimal amount of time for analyzing a distributed network environmentCISCO TECH INC·Filed 2021·Granted Sep 5, 2023·0 cites·17 claims
- 3868US10873509B2Check-pointing ACI network state and re-execution from a check-pointed stateCISCO TECH INC·Filed 2018·Granted Dec 22, 2020·1 cites·20 claims
- 3968US9442846B2High speed memory systems and methods for designing hierarchical memory systemsIYER SUNDAR·Filed 2010·Granted Sep 13, 2016·2 cites·22 claims
- 4066US9147466B2Methods and apparatus for designing and constructing dual write memory circuits with voltage assistCISCO TECH INC·Filed 2014·Granted Sep 29, 2015·2 cites·10 claims
- 4166US8266408B2System and method for storing data in a virtualized high speed memory systemIYER SUNDAR·Filed 2009·Granted Sep 11, 2012·2 cites·18 claims
- 4265US10282344B2Sensor bus interface for electronic devicesINTEL CORP·Filed 2015·Granted May 7, 2019·1 cites·19 claims
- 4365US6340615B1Method of forming a trench capacitor DRAM cellIBM·Filed 1999·Granted Jan 22, 2002·21 cites·6 claims
- 4463US11121927B2Automatically determining an optimal amount of time for analyzing a distributed network environmentCISCO TECH INC·Filed 2019·Granted Sep 14, 2021·0 cites·18 claims
- 4563US8935507B2System and method for storing multiple copies of data in a high speed memory systemMEMOIR SYSTEMS INC·Filed 2013·Granted Jan 13, 2015·1 cites·16 claims
- 4662US7136926B1Method and apparatus for high-speed network rule processingPMC SIERRRA US INC·Filed 1998·Granted Nov 14, 2006·58 cites·20 claims
- 4760US11463316B2Topology explorerCISCO TECH INC·Filed 2019·Granted Oct 4, 2022·0 cites·20 claims
- 4858US11563645B2Shim layer for extracting and prioritizing underlying rules for modeling network intentsCISCO TECH INC·Filed 2021·Granted Jan 24, 2023·0 cites·20 claims
- 4957US9063876B2System and method for simultaneously storing and read data from a memory systemMEMOIR SYSTEMS INC·Filed 2014·Granted Jun 23, 2015·0 cites·6 claims
- 5056US11824728B2Check-pointing ACI network state and re-execution from a check-pointed stateCISCO TECH INC·Filed 2020·Granted Nov 21, 2023·0 cites·18 claims
Showing the top 50 of 60 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →