Inventor · disambiguated record
Chon-Shin Jou
Also filed as: JOU CHON S · JOU CHON-SHIN
10 granted patents·3 pending applications·52 citations·filing 1996–2013
85Inventor score
Top patents by PatentIndex Score
13 records- 0156US5824234AMethod for forming low contact resistance bonding padMOSEL VITELIC INC·Filed 1996·Granted Oct 20, 1998·23 cites·29 claims
- 0254US6727189B2Method for detecting metal contamination on a silicon chip by implanting arsenicMOSEL VITELIC INC·Filed 2002·Granted Apr 27, 2004·2 cites·15 claims
- 0349US5837578AProcess of manufacturing a trenched stack-capacitorMOSEL VITELIC INC·Filed 1997·Granted Nov 17, 1998·12 cites·33 claims
- 0440US5747378AMethod of damage free doping for forming a dram memory cellMOSEL VITELIC INC·Filed 1997·Granted May 5, 1998·9 cites·19 claims
- 0539US2006046207A1Exposure methodMOSEL VITELIC INC·Filed 2005·Application pending·0 cites
- 0635US6380072B2Metallizing process of semiconductor industryMOSEL VITELIC INC·Filed 2000·Granted Apr 30, 2002·0 cites·18 claims
- 0733US5882984AMethod for increasing the refresh time of the DRAMMOSEL VITELIC INC·Filed 1996·Granted Mar 16, 1999·4 cites·19 claims
- 0833US2007020842A1Method of manufacturing mask ROMMOSEL VITELIC INC·Filed 2006·Application pending·0 cites
- 0929US6812148B2Preventing gate oxice thinning effect in a recess LOCOS processMOSEL VITELIC INC·Filed 2002·Granted Nov 2, 2004·0 cites·20 claims
- 1029US6010938AMethod for making a load resistor on a semiconductor chipMOSEL VITELIC INC·Filed 1998·Granted Jan 4, 2000·1 cites·11 claims
- 1128US9153675B2Power semiconductor and manufacturing method thereofMOSEL VITALEC INC·Filed 2013·Granted Oct 6, 2015·0 cites·5 claims
- 1227US6245608B1Ion implantation process for forming contact regions in semiconductor materialsMOSEL VITELIC INC·Filed 1999·Granted Jun 12, 2001·1 cites·19 claims
- 1321US2002197858A1Method for fabricating semiconductor devicesFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →