Inventor · disambiguated record
Emmanuel De Muizon
Also filed as: DE MUIZON EMMANUEL
10 granted patents·182 citations·filing 1998–2007
90Inventor score
Files withKONINKL PHILIPS ELECTRONICS NV5PHILIPS SEMICONDUCTOR INC2VLSI TECHNOLOGY INC2SANDISK CORP1
Top patents by PatentIndex Score
10 records- 0182US6410413B2Semiconductor device with transparent link area for silicide applications and fabrication thereofKONINKL PHILIPS ELECTRONICS NV·Filed 2001·Granted Jun 25, 2002·27 cites·9 claims
- 0280US6326675B1Semiconductor device with transparent link area for silicide applications and fabrication thereofPHILIPS SEMICONDUCTOR INC·Filed 1999·Granted Dec 4, 2001·41 cites·27 claims
- 0377US6091594AProtection circuits and methods of protecting a semiconductor deviceVLSI TECHNOLOGY INC·Filed 1998·Granted Jul 18, 2000·44 cites·57 claims
- 0467US6262455B1Method of forming dual gate oxide layers of varying thickness on a single substratePHILIPS SEMICONDUCTOR INC·Filed 1999·Granted Jul 17, 2001·26 cites·20 claims
- 0565US6150266ALocal interconnect formed using silicon spacerVLSI TECHNOLOGY INC·Filed 1999·Granted Nov 21, 2000·27 cites·13 claims
- 0662US7898013B2Integrated circuits and methods with two types of decoupling capacitorsSANDISK CORP·Filed 2007·Granted Mar 1, 2011·2 cites·14 claims
- 0756US6448122B1Method and device structure for enhanced ESD performanceKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Sep 10, 2002·7 cites·10 claims
- 0854US6541359B1Optimized gate implants for reducing dopant effects during gate etchingKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Apr 1, 2003·6 cites·20 claims
- 0946US6703668B1Local interconnect formed using silicon spacerKONINKL PHILIPS ELECTRONICS NV·Filed 2000·Granted Mar 9, 2004·2 cites·12 claims
- 1036US6822291B2Optimized gate implants for reducing dopant effects during gate etchingKONINKL PHILIPS ELECTRONICS NV·Filed 2003·Granted Nov 23, 2004·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →