Inventor · disambiguated record
Dennis R. Conti
Also filed as: CONTI DENNIS · CONTI DENNIS R
15 granted patents·4 pending applications·480 citations·filing 1986–2020
92Inventor score
Top patents by PatentIndex Score
19 records- 0193US6847203B1Applying parametric test patterns for high pin count ASICs on low pin count testersIBM·Filed 2003·Granted Jan 25, 2005·84 cites·20 claims
- 0293US6275051B1Segmented architecture for wafer test and burn-inIBM·Filed 1999·Granted Aug 14, 2001·127 cites·27 claims
- 0391US7388869B2System and method for routing among private addressing domainsHUGHES NETWORK SYSTEMS LLC·Filed 2003·Granted Jun 17, 2008·100 cites·47 claims
- 0487US10261108B2Low force wafer test probe with variable geometryIBM·Filed 2016·Granted Apr 16, 2019·3 cites·21 claims
- 0576US4751656AMethod for choosing replacement lines in a two dimensionally redundant arrayIBM·Filed 1986·Granted Jun 14, 1988·45 cites·5 claims
- 0675US11322473B2Interconnect and tuning thereofIBM·Filed 2019·Granted May 3, 2022·2 cites·13 claims
- 0774US5280625ACommunication system and method for linking data terminals and their host computers through a satellite or other wide area networkHUGHES AIRCRAFT CO·Filed 1992·Granted Jan 18, 1994·117 cites·34 claims
- 0870US11009545B2Integrated circuit tester probe contact linerIBM·Filed 2020·Granted May 18, 2021·0 cites·20 claims
- 0969US10670653B2Integrated circuit tester probe contact linerIBM·Filed 2018·Granted Jun 2, 2020·0 cites·16 claims
- 1067US11029334B2Low force wafer test probeIBM·Filed 2019·Granted Jun 8, 2021·0 cites·10 claims
- 1166US10663487B2Low force wafer test probe with variable geometryIBM·Filed 2019·Granted May 26, 2020·0 cites·21 claims
- 1262US2018358323A1Pressing solder bumps to match probe profile during wafer level testingIBM·Filed 2017·Application pending·0 cites
- 1358US10444260B2Low force wafer test probeIBM·Filed 2016·Granted Oct 15, 2019·0 cites·23 claims
- 1448US11561243B2Compliant organic substrate assembly for rigid probesIBM·Filed 2019·Granted Jan 24, 2023·0 cites·16 claims
- 1548US2018358322A1Pressing solder bumps to match probe profile during wafer level testingIBM·Filed 2017·Application pending·0 cites
- 1647US9152517B2Programmable active thermal controlCHASE HAROLD·Filed 2011·Granted Oct 6, 2015·1 cites·16 claims
- 1747US2018358321A1Pressing solder bumps to match probe profile during wafer level testingIBM·Filed 2017·Application pending·0 cites
- 1840US7265561B2Device burn in utilizing voltage controlIBM·Filed 2003·Granted Sep 4, 2007·1 cites·12 claims
- 1933US2001050567A1Segmented architecture for wafer test & burn-inIBM·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →