Inventor · disambiguated record
Philippe Molson
Also filed as: MOLSON PHILIPPE
25 granted patents·338 citations·filing 2000–2019
96Inventor score
Top patents by PatentIndex Score
25 records- 0194US9684615B1Apparatus and methods for multiple-channel direct memory accessALTERA CORP·Filed 2015·Granted Jun 20, 2017·22 cites·18 claims
- 0293US9053093B1Modular direct memory access systemALTERA CORP·Filed 2013·Granted Jun 9, 2015·26 cites·21 claims
- 0392US9257987B1Partial reconfiguration using configuration transaction layer packetsALTERA CORP·Filed 2015·Granted Feb 9, 2016·10 cites·20 claims
- 0489US7480603B1Finite impulse response (FIR) filter compilerALTERA CORP·Filed 2006·Granted Jan 20, 2009·18 cites·21 claims
- 0588US7143368B1DSP design system level power estimationALTERA CORP·Filed 2004·Granted Nov 28, 2006·45 cites·28 claims
- 0687US6634009B1Interleaver-deinterleaver megacoreALTERA CORP·Filed 2000·Granted Oct 14, 2003·51 cites·40 claims
- 0785US9552323B1High-speed peripheral component interconnect (PCIe) input-output devices with receive buffer management circuitryALTERA CORP·Filed 2013·Granted Jan 24, 2017·11 cites·21 claims
- 0884US7873953B1High-level language code sequence optimization for implementing programmable chip designsALTERA CORP·Filed 2006·Granted Jan 18, 2011·14 cites·24 claims
- 0980US7676355B1Method and apparatus for providing protected intellectual propertyALTERA CORP·Filed 2006·Granted Mar 9, 2010·8 cites·12 claims
- 1077US7882457B1DSP design system level power estimationALTERA CORP·Filed 2006·Granted Feb 1, 2011·7 cites·19 claims
- 1176US7089173B1Hardware opencore evaluationALTERA CORP·Filed 2001·Granted Aug 8, 2006·17 cites·46 claims
- 1275US7318014B1Bit accurate hardware simulation in system level simulatorsALTERA CORP·Filed 2002·Granted Jan 8, 2008·22 cites·38 claims
- 1374US8291396B1Scheduling optimization of aliased pointers for implementation on programmable chipsLAU DAVID JAMES·Filed 2006·Granted Oct 16, 2012·8 cites·30 claims
- 1473US8200472B1Method and apparatus for providing protected intellectual propertyMOLSON PHILIPPE·Filed 2010·Granted Jun 12, 2012·2 cites·20 claims
- 1573US7991606B1Embedded logic analyzer functionality for system level environmentsALTERA CORP·Filed 2003·Granted Aug 2, 2011·23 cites·17 claims
- 1671US7110927B1Finite impulse response (FIR) filter compilerALTERA CORP·Filed 2001·Granted Sep 19, 2006·16 cites·38 claims
- 1768US8578356B1High-level language code sequence optimization for implementing programmable chip designsPRITCHARD JEFFREY ORION·Filed 2010·Granted Nov 5, 2013·2 cites·20 claims
- 1868US8402419B1DSP design system level power estimationPLOFSKY JORDAN·Filed 2011·Granted Mar 19, 2013·2 cites·22 claims
- 1967US7509246B1System level simulation models for hardware modulesALTERA CORP·Filed 2003·Granted Mar 24, 2009·13 cites·22 claims
- 2067US7360189B1Method and apparatus for enabling waveform display in a system design modelALTERA CORP·Filed 2004·Granted Apr 15, 2008·11 cites·20 claims
- 2165US8661396B1DSP design system level power estimationALTERA CORP·Filed 2013·Granted Feb 25, 2014·1 cites·20 claims
- 2262US7181384B1Method and apparatus for simulating a hybrid system with registered and concurrent nodesALTERA CORP·Filed 2004·Granted Feb 20, 2007·9 cites·23 claims
- 2355US10866278B2Methods and apparatus for performing design for debug via protocol interfaceINTEL CORP·Filed 2019·Granted Dec 15, 2020·0 cites·19 claims
- 2454US9329847B1High-level language code sequence optimization for implementing programmable chip designsALTERA CORP·Filed 2013·Granted May 3, 2016·0 cites·20 claims
- 2547US7865347B1Finite impulse response (FIR) filter compiler for estimating cost of implementing a filterALTERA CORP·Filed 2008·Granted Jan 4, 2011·0 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →