Inventor · disambiguated record
Jonathon Evans
Also filed as: EVANS JONATHON · EVANS JONATHON S · EVANS JONATHON STUART RAMSAY · EVANS JONATHON STUART RAMSEY
15 granted patents·5 pending applications·29 citations·filing 2011–2025
88Inventor score
Top patents by PatentIndex Score
20 records- 0189US10217183B2System, method, and computer program product for simultaneous execution of compute and graphics workloadsNVIDIA CORP·Filed 2013·Granted Feb 26, 2019·12 cites·19 claims
- 0286US9575892B2Replaying memory transactions while resolving memory access faultsNVIDIA CORP·Filed 2013·Granted Feb 21, 2017·8 cites·20 claims
- 0381US11579925B2Techniques for reconfiguring partitions in a parallel processing systemNVIDIA CORP·Filed 2019·Granted Feb 14, 2023·3 cites·20 claims
- 0480US12498979B2Techniques for configuring a processor to function as multiple, separate processors in a virtualized environmentNVIDIA CORP·Filed 2021·Granted Dec 16, 2025·1 cites·48 claims
- 0580US2025355716A1Techniques for configuring a processor to function as multiple, separate processors in a virtualized environmentNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0674US10430356B2Low overhead copy engine fault and switch mechanismNVIDIA CORP·Filed 2017·Granted Oct 1, 2019·2 cites·20 claims
- 0770US11663036B2Techniques for configuring a processor to function as multiple, separate processorsNVIDIA CORP·Filed 2019·Granted May 30, 2023·1 cites·20 claims
- 0870US11249905B2Techniques for configuring a processor to function as multiple, separate processorsNVIDIA CORP·Filed 2019·Granted Feb 15, 2022·1 cites·20 claims
- 0963US10114758B2Techniques for supporting for demand pagingNVIDIA CORP·Filed 2013·Granted Oct 30, 2018·1 cites·26 claims
- 1057US12443363B2High bandwidth extended memory in a parallel processing systemNVIDIA CORP·Filed 2022·Granted Oct 14, 2025·0 cites·21 claims
- 1157US9830276B2Replaying memory transactions while resolving memory access faultsNVIDIA CORP·Filed 2017·Granted Nov 28, 2017·0 cites·14 claims
- 1255US2025125953A1System for access controlNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1354US2025355692A1Master time translation in peripheral deviceMELLANOX TECHNOLOGIES LTD·Filed 2024·Application pending·0 cites
- 1452US2025119413A1System for secure data transmissionNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1551US11934567B2Preventing unauthorized translated access using address signingNVIDIA CORP·Filed 2021·Granted Mar 19, 2024·0 cites·20 claims
- 1649US12481602B2Preventing unauthorized memory access using a physical address access permissions tableNVIDIA CORP·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 1749US11954518B2User-defined metered priority queuesNVIDIA CORP·Filed 2019·Granted Apr 9, 2024·0 cites·19 claims
- 1848US2024403048A1Categorized memory operations for selective memory flushingNVIDIA CORP·Filed 2023·Application pending·0 cites
- 1947US11893423B2Techniques for configuring a processor to function as multiple, separate processorsNVIDIA CORP·Filed 2019·Granted Feb 6, 2024·0 cites·19 claims
- 2041US9442759B2Concurrent execution of independent streams in multi-channel time slice groupsDUNCAN SAMUEL H·Filed 2011·Granted Sep 13, 2016·0 cites·23 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →