Inventor · disambiguated record
Chris Michael Brueggen
Also filed as: BRUEGGEN CHRIS · BRUEGGEN CHRIS M · BRUEGGEN CHRIS MICHAEL
17 granted patents·2 pending applications·72 citations·filing 2004–2019
89Inventor score
Files withHEWLETT PACKARD ENTPR DEV LP12HEWLETT PACKARD DEVELOPMENT CO3BRUEGGEN CHRIS1BRUEGGEN CHRIS M1BRUEGGEN CHRIS MICHAEL1
Top patents by PatentIndex Score
19 records- 0186US7237176B2Partitioning data for error correctionHEWLETT PACKARD DEVELOPMENT CO·Filed 2004·Granted Jun 26, 2007·55 cites·19 claims
- 0280US10567003B2List decode circuitsHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Feb 18, 2020·5 cites·14 claims
- 0374US10735030B2Re-encoding data associated with failed memory devicesHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Aug 4, 2020·3 cites·15 claims
- 0471US10922178B2Masterless raid for byte-addressable non-volatile memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2018·Granted Feb 16, 2021·1 cites·20 claims
- 0561US7817653B2Priority selection circuitHEWLETT PACKARD DEVELOPMENT CO·Filed 2007·Granted Oct 19, 2010·2 cites·17 claims
- 0660US10666294B2Error correction code words with binomial bit error distributionHEWLETT PACKARD ENTPR DEV LP·Filed 2018·Granted May 26, 2020·1 cites·20 claims
- 0760US8085801B2Resource arbitrationBRUEGGEN CHRIS MICHAEL·Filed 2009·Granted Dec 27, 2011·3 cites·20 claims
- 0859US10275307B2Detection of error patterns in memory diesHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Apr 30, 2019·1 cites·20 claims
- 0956US10312943B2Error correction code in memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Jun 4, 2019·1 cites·20 claims
- 1052US10176043B2Memory controllerHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Jan 8, 2019·0 cites·16 claims
- 1146US10402287B2Preventing data corruption and single point of failure in a fault-tolerant memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2015·Granted Sep 3, 2019·0 cites·15 claims
- 1246US8521940B2Paired node controllersBRUEGGEN CHRIS M·Filed 2009·Granted Aug 27, 2013·0 cites·20 claims
- 1345US8316189B2Rescinding ownership of a cache line in a computer systemBRUEGGEN CHRIS·Filed 2009·Granted Nov 20, 2012·0 cites·14 claims
- 1445US2021110243A1Deep learning accelerator system interfaceHEWLETT PACKARD ENTPR DEV LP·Filed 2019·Application pending·0 cites
- 1544US8370582B2Merging subsequent updates to a memory locationHEWLETT PACKARD DEVELOPMENT CO·Filed 2010·Granted Feb 5, 2013·0 cites·10 claims
- 1643US2008270708A1System and Method for Achieving Cache Coherency Within Multiprocessor Computer SystemWARNER CRAIG·Filed 2007·Application pending·0 cites
- 1739US10050641B1List manipulation circuitsHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Aug 14, 2018·0 cites·17 claims
- 1837US10367529B2List decode circuitsHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Jul 30, 2019·0 cites·19 claims
- 1932US10243587B2Managing results from list decode methodsHEWLETT PACKARD ENTPR DEV LP·Filed 2017·Granted Mar 26, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →