Inventor · disambiguated record
Hem C. Neema
Also filed as: NEEMA HEM C
31 granted patents·2 pending applications·174 citations·filing 2006–2023
96Inventor score
Top patents by PatentIndex Score
33 records- 0194US10922068B1Updating firmware for programmable integrated circuits in computing environmentsXILINX INC·Filed 2018·Granted Feb 16, 2021·10 cites·16 claims
- 0291US11762762B1Static and automatic inference of inter-basic block burst transfers for high-level synthesisXILINX INC·Filed 2022·Granted Sep 19, 2023·4 cites·20 claims
- 0390US7721090B1Event-driven simulation of IP using third party event-driven simulatorsXILINX INC·Filed 2006·Granted May 18, 2010·28 cites·19 claims
- 0489US11238199B1High-level synthesis vector library for single-instruction multiple data programming and electronic system designXILINX INC·Filed 2020·Granted Feb 1, 2022·3 cites·20 claims
- 0589US10956241B1Unified container for hardware and software binariesXILINX INC·Filed 2017·Granted Mar 23, 2021·7 cites·10 claims
- 0689US10713404B1Customizable debug and profile monitoring of reconfigurable systemsXILINX INC·Filed 2018·Granted Jul 14, 2020·8 cites·20 claims
- 0789US10296673B1Mixed-language simulationXILINX INC·Filed 2015·Granted May 21, 2019·11 cites·16 claims
- 0888US11042610B1Enabling integrity and authenticity of design dataXILINX INC·Filed 2017·Granted Jun 22, 2021·8 cites·17 claims
- 0987US8265918B1Simulation and emulation of a circuit designNEEMA HEM C·Filed 2009·Granted Sep 11, 2012·18 cites·18 claims
- 1084US11474555B1Data-driven platform characteristics capture and discovery for hardware acceleratorsXILINX INC·Filed 2017·Granted Oct 18, 2022·4 cites·20 claims
- 1183US8327311B1Generating a simulation model of a circuit designNEEMA HEM C·Filed 2011·Granted Dec 4, 2012·8 cites·19 claims
- 1282US10924430B2Streaming platform flow and architecture for an integrated circuitXILINX INC·Filed 2018·Granted Feb 16, 2021·4 cites·19 claims
- 1381US9135384B1Compilation and simulation of a circuit designSANTAN SONAL·Filed 2012·Granted Sep 15, 2015·8 cites·18 claims
- 1481US8074077B1Securing circuit designs within circuit design toolsNEEMA HEM C·Filed 2007·Granted Dec 6, 2011·12 cites·18 claims
- 1580US9117043B1Net sensitivity ranges for detection of simulation eventsHUANG LIXIN·Filed 2012·Granted Aug 25, 2015·6 cites·16 claims
- 1680US8418095B1Compilation and simulation of a circuit designNEEMA HEM C·Filed 2012·Granted Apr 9, 2013·6 cites·14 claims
- 1779US8868396B1Verification and debugging using heterogeneous simulation modelsSHIRAZI NABEEL·Filed 2009·Granted Oct 21, 2014·10 cites·15 claims
- 1878US9223910B1Performance and memory efficient modeling of HDL ports for simulationXILINX INC·Filed 2014·Granted Dec 29, 2015·6 cites·20 claims
- 1977US10802995B2Unified address space for multiple hardware accelerators using dedicated low latency linksXILINX INC·Filed 2018·Granted Oct 13, 2020·2 cites·20 claims
- 2072US8838431B1Mixed-language simulationMIHALACHE VALERIA·Filed 2011·Granted Sep 16, 2014·4 cites·20 claims
- 2171US10642811B1Address-based waveform database architectureXILINX INC·Filed 2014·Granted May 5, 2020·3 cites·19 claims
- 2266US10877766B2Embedded scheduling of hardware resources for hardware accelerationXILINX INC·Filed 2018·Granted Dec 29, 2020·1 cites·16 claims
- 2362US11720422B1Unified container for hardware and software binariesXILINX INC·Filed 2021·Granted Aug 8, 2023·0 cites·18 claims
- 2462US8161436B1Method and system for transforming fork-join blocks in a hardware description language (HDL) specificationNEEMA HEM C·Filed 2009·Granted Apr 17, 2012·2 cites·20 claims
- 2559US12488166B2Implementing burst transfers for predicated memory accesses in loop bodies for high-level synthesisXILINX INC·Filed 2022·Granted Dec 2, 2025·0 cites·20 claims
- 2657US11836426B1Early detection of sequential access violations for high level synthesisXILINX INC·Filed 2022·Granted Dec 5, 2023·0 cites·18 claims
- 2756US8447581B1Generating simulation code from a specification of a circuit designROTH DAVID·Filed 2009·Granted May 21, 2013·1 cites·20 claims
- 2853US2025156617A1Simulating data transfers for high-level synthesis designsXILINX INC·Filed 2023·Application pending·0 cites
- 2952US11314911B1High-level synthesis implementation of data structures in hardwareXILINX INC·Filed 2021·Granted Apr 26, 2022·0 cites·20 claims
- 3050US12468581B2Inter-kernel dataflow analysis and deadlock detectionXILINX INC·Filed 2021·Granted Nov 11, 2025·0 cites·16 claims
- 3150US2024411967A1High-level synthesis of designs using loop-aware execution informationXILINX INC·Filed 2023·Application pending·0 cites
- 3244US8495539B1Scheduling processes in simulation of a circuit designMIHALACHE VALERIA·Filed 2012·Granted Jul 23, 2013·0 cites·19 claims
- 3337US8516413B1Compilation and simulation of a circuit designDESHPANDE SANDEEP S·Filed 2012·Granted Aug 20, 2013·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →