Inventor · disambiguated record
Barry Duane Williamson
Also filed as: WILLIAMSON BARRY D · WILLIAMSON BARRY DUANE
11 granted patents·5 pending applications·193 citations·filing 1997–2016
91Inventor score
Technology areasG06F
Top patents by PatentIndex Score
16 records- 0186US6532574B1Post-manufacture signal delay adjustment to solve noise-induced delay variationsIBM·Filed 2000·Granted Mar 11, 2003·47 cites·20 claims
- 0284US10372618B2Apparatus and method for maintaining address translation data within an address translation cacheADVANCED RISC MACH LTD·Filed 2016·Granted Aug 6, 2019·7 cites·14 claims
- 0376US7900020B2Correction of incorrect cache accessesADVANCED RISC MACH LTD·Filed 2008·Granted Mar 1, 2011·7 cites·12 claims
- 0465US10102143B2Eviction control for an address translation cacheADVANCED RISC MACH LTD·Filed 2016·Granted Oct 16, 2018·1 cites·18 claims
- 0561US6112297AApparatus and method for processing misaligned load instructions in a processor supporting out of order executionIBM·Filed 1998·Granted Aug 29, 2000·39 cites·9 claims
- 0659US6148394AApparatus and method for tracking out of order load instructions to avoid data coherency violations in a processorIBM·Filed 1998·Granted Nov 14, 2000·37 cites·7 claims
- 0751US8271733B2Line allocation in multi-level hierarchical data storesWILLIAMSON BARRY DUANE·Filed 2009·Granted Sep 18, 2012·1 cites·19 claims
- 0851US6035394ASystem for providing high performance speculative processing of complex load/store instructions by generating primitive instructions in the load/store unit and sequencer in parallelIBM·Filed 1998·Granted Mar 7, 2000·25 cites·20 claims
- 0947US2010161901A9Correction of incorrect cache accessesADVANCED RISC MACH LTD·Filed 2005·Application pending·0 cites
- 1042US2006236074A1Indicating storage locations within cachesADVANCED RISC MACH LTD·Filed 2005·Application pending·0 cites
- 1142US2006218124A1Performance of a data processing apparatusADVANCED RISC MACH LTD·Filed 2005·Application pending·0 cites
- 1242US2007028051A1Time and power reduction in cache accessesTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 1338US5926645AMethod and system for enabling multiple store instruction completions in a processing systemIBM·Filed 1997·Granted Jul 20, 1999·11 cites·10 claims
- 1435US2003028751A1Modular accelerator frameworkFiled 2001·Application pending·0 cites
- 1533US6192461B1Method and apparatus for facilitating multiple storage instruction completions in a superscalar processor during a single clock cycleIBM·Filed 1998·Granted Feb 20, 2001·15 cites·8 claims
- 1630US6405352B1Method and system for analyzing wire-only changes to a microprocessor design using delta modelIBM·Filed 1999·Granted Jun 11, 2002·3 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →