Inventor · disambiguated record
Alec J. Morton
Also filed as: MORTON ALEC · MORTON ALEC J · MORTON ALEC JAMES
15 granted patents·3 pending applications·317 citations·filing 1984–2005
94Inventor score
Files withTEXAS INSTRUMENTS INC15
Top patents by PatentIndex Score
18 records- 0194US7471570B2Embedded EEPROM array techniques for higher densityTEXAS INSTRUMENTS INC·Filed 2005·Granted Dec 30, 2008·40 cites·43 claims
- 0291US6548874B1Higher voltage transistors for sub micron CMOS processesTEXAS INSTRUMENTS INC·Filed 2000·Granted Apr 15, 2003·86 cites·32 claims
- 0381US6468849B1Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technologyTEXAS INSTRUMENTS INC·Filed 2000·Granted Oct 22, 2002·24 cites·7 claims
- 0479US6303420B1Integrated bipolar junction transistor for mixed signal circuitsTEXAS INSTRUMENTS INC·Filed 2000·Granted Oct 16, 2001·25 cites·16 claims
- 0575US6413824B1Method to partially or completely suppress pocket implant in selective circuit elements with no additional mask in a cmos flow where separate masking steps are used for the drain extension implants for the low voltage and high voltage transistorsTEXAS INSTRUMENTS INC·Filed 2000·Granted Jul 2, 2002·21 cites·17 claims
- 0673US6680226B2Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technologyTEXAS INSTRUMENTS INC·Filed 2002·Granted Jan 20, 2004·15 cites·3 claims
- 0767US4740906ADigital lattice filter with multiplexed fast adder/full adder for performing sequential multiplication and addition operationsTEXAS INSTRUMENTS INC·Filed 1984·Granted Apr 26, 1988·15 cites·22 claims
- 0866US5801091AMethod for current ballasting and busing over active device area using a multi-level conductor processTEXAS INSTRUMENTS INC·Filed 1997·Granted Sep 1, 1998·29 cites·4 claims
- 0959US7541275B2Method for manufacturing an interconnectTEXAS INSTRUMENTS INC·Filed 2004·Granted Jun 2, 2009·10 cites·15 claims
- 1059US4695970ALinear predictive coding technique with interleaved sequence digital lattice filterTEXAS INSTRUMENTS INC·Filed 1984·Granted Sep 22, 1987·12 cites·18 claims
- 1158US6591409B2Measuring integrated circuit layout efficiencyTEXAS INSTRUMENTS INC·Filed 2001·Granted Jul 8, 2003·9 cites·6 claims
- 1250US5665991ADevice having current ballasting and busing over active area using a multi-level conductor processTEXAS INSTRUMENTS INC·Filed 1995·Granted Sep 9, 1997·14 cites·7 claims
- 1339US4700323ADigital lattice filter with multiplexed full adderTEXAS INSTRUMENTS INC·Filed 1984·Granted Oct 13, 1987·5 cites·20 claims
- 1436US4686644ALinear predictive coding technique with symmetrical calculation of Y-and B-valuesTEXAS INSTRUMENTS INC·Filed 1984·Granted Aug 11, 1987·7 cites·18 claims
- 1534US2005127516A1Small viatops for thick copper connectorsFiled 2003·Application pending·0 cites
- 1634US2005145922A1EEPROM and flash EEPROMFiled 2003·Application pending·0 cites
- 1732US2003127694A1Higher voltage transistors for sub micron CMOS processesFiled 2002·Application pending·0 cites
- 1831US4796216ALinear predictive coding technique with one multiplication step per stageTEXAS INSTRUMENTS INC·Filed 1987·Granted Jan 3, 1989·5 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →