Inventor · disambiguated record
Jorge Ernesto Carrillo
Also filed as: CARRILLO JORGE E · CARRILLO JORGE ERNESTO
17 granted patents·199 citations·filing 2002–2019
94Inventor score
Top patents by PatentIndex Score
17 records- 0194US10977018B1Development environment for heterogeneous devicesXILINX INC·Filed 2019·Granted Apr 13, 2021·17 cites·20 claims
- 0294US9880966B1Encapsulating metadata of a platform for application-specific tailoring and reuse of the platform in an integrated circuitXILINX INC·Filed 2015·Granted Jan 30, 2018·14 cites·20 claims
- 0394US9652570B1Automatic implementation of a customized system-on-chipXILINX INC·Filed 2015·Granted May 16, 2017·21 cites·20 claims
- 0492US9223921B1Compilation of HLL code with hardware accelerated functionsXILINX INC·Filed 2014·Granted Dec 29, 2015·18 cites·20 claims
- 0589US7386827B1Building a simulation environment for a design blockXILINX INC·Filed 2006·Granted Jun 10, 2008·24 cites·20 claims
- 0688US9805152B1Compilation of system designsXILINX INC·Filed 2016·Granted Oct 31, 2017·6 cites·20 claims
- 0786US8447957B1Coprocessor interface architecture and methods of operating the sameCARRILLO JORGE ERNESTO·Filed 2006·Granted May 21, 2013·32 cites·18 claims
- 0886US7437701B1Simulation of a programming language specification of a circuit designXILINX INC·Filed 2006·Granted Oct 14, 2008·21 cites·20 claims
- 0980US9075624B2Compilation of system designsXILINX INC·Filed 2013·Granted Jul 7, 2015·6 cites·16 claims
- 1077US7606694B1Framework for cycle accurate simulationXILINX INC·Filed 2006·Granted Oct 20, 2009·9 cites·20 claims
- 1171US10755013B1Automatic creation of high-level language callable library for a hardware coreXILINX INC·Filed 2018·Granted Aug 25, 2020·2 cites·18 claims
- 1271US7453286B1Comparator and method of implementing a comparator in a device having programmable logicXILINX INC·Filed 2007·Granted Nov 18, 2008·6 cites·20 claims
- 1369US7426583B1Method and circuit for decoding an address of an address spaceXILINX INC·Filed 2005·Granted Sep 16, 2008·5 cites·14 claims
- 1464US7505887B1Building a simulation of design block using a bus functional model and an HDL testbenchXILINX INC·Filed 2006·Granted Mar 17, 2009·3 cites·18 claims
- 1562US7315803B1Verification environment creation infrastructure for bus-based systems and modulesXILINX INC·Filed 2005·Granted Jan 1, 2008·4 cites·20 claims
- 1658US7490227B1Method and system to recreate instruction and data traces in an embedded processorXILINX INC·Filed 2004·Granted Feb 10, 2009·7 cites·12 claims
- 1754US6963966B1Accumulator-based load-store CPU architecture implementation in a programmable logic deviceXILINX INC·Filed 2002·Granted Nov 8, 2005·4 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →