Inventor · disambiguated record
Guillermo Savransky
Also filed as: SAVRANSKY GUILLERMO
10 granted patents·7 pending applications·104 citations·filing 2002–2017
88Inventor score
Top patents by PatentIndex Score
17 records- 0193US7590825B2Counter-based memory disambiguation techniques for selectively predicting load/store conflictsINTEL CORP·Filed 2006·Granted Sep 15, 2009·41 cites·6 claims
- 0290US7757103B2Method and apparatus to estimate energy consumed by central processing unit coreINTEL CORP·Filed 2006·Granted Jul 13, 2010·24 cites·25 claims
- 0383US8549263B2Counter-based memory disambiguation techniques for selectively predicting load/store conflictsKRIMER EVGENI·Filed 2010·Granted Oct 1, 2013·9 cites·20 claims
- 0474US9760966B2Parallel processor with integrated correlation and convolution engineNVIDIA CORP·Filed 2013·Granted Sep 12, 2017·3 cites·21 claims
- 0573US8812823B2Memory disambiguation techniques using counter ratio to selectively disable load/store conflict predictionKRIMER EVGENI·Filed 2009·Granted Aug 19, 2014·6 cites·17 claims
- 0664US6910121B2System and method of reducing the number of copies from alias registers to real registers in the commitment of instructionsINTEL CORP·Filed 2002·Granted Jun 21, 2005·11 cites·16 claims
- 0757US8074131B2Generic debug external connection (GDXC) for high integration integrated circuitsKURTS TSVIKA·Filed 2009·Granted Dec 6, 2011·5 cites·22 claims
- 0857US7024542B2System and method of reducing the number of copies from alias registers to real registers in the commitment of instructionsINTEL CORP·Filed 2002·Granted Apr 4, 2006·5 cites·24 claims
- 0953US2017358053A1Parallel processor with integrated correlation and convolution engineNVIDIA CORP·Filed 2017·Application pending·0 cites
- 1045US7389406B2Apparatus and methods for utilization of splittable execution units of a processorINTEL CORP·Filed 2004·Granted Jun 17, 2008·0 cites·38 claims
- 1141US2015036875A1Method and system for application execution based on object recognition for mobile devicesNVIDIA CORP·Filed 2013·Application pending·0 cites
- 1241US2007022274A1Apparatus, system, and method of predicting and correcting critical pathsROSNER RONI·Filed 2005·Application pending·0 cites
- 1341US2015022636A1Method and system for voice capture using face detection in noisy environmentsNVIDIA CORP·Filed 2013·Application pending·0 cites
- 1441US2007005940A1System, apparatus and method of executing a micro operationSPERBER ZEEV·Filed 2005·Application pending·0 cites
- 1537US2006095731A1Method and apparatus for avoiding read port assignment of a reorder bufferBUSTAN YUVAL·Filed 2004·Application pending·0 cites
- 1637US2007192573A1Device, system and method of handling FXCH instructionsSAVRANSKY GUILLERMO·Filed 2006·Application pending·0 cites
- 1736US7577825B2Method for data validity tracking to determine fast or slow mode processing at a reservation stationINTEL CORP·Filed 2006·Granted Aug 18, 2009·0 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →