Inventor · disambiguated record
Tor M. Aamodt
Also filed as: AAMODT TOR · AAMODT TOR M
8 granted patents·2 pending applications·130 citations·filing 2003–2024
88Inventor score
Files withINTEL CORP5MELVIN STEPHEN2BOARD TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY1UNIV BRITISH COLUMBIA1WANG HONG1
Top patents by PatentIndex Score
10 records- 0193US11768715B1Thread scheduling on SIMT architectures with busy-wait synchronizationMELVIN STEPHEN·Filed 2020·Granted Sep 26, 2023·9 cites·18 claims
- 0290US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0386US7523465B2Methods and apparatus for generating speculative helper thread spawn-target pointsINTEL CORP·Filed 2003·Granted Apr 21, 2009·35 cites·31 claims
- 0482US11308025B1State machine block for high-level synthesisMELVIN STEPHEN·Filed 2020·Granted Apr 19, 2022·3 cites·29 claims
- 0579US7404067B2Method and apparatus for efficient utilization for prescient instruction prefetchINTEL CORP·Filed 2003·Granted Jul 22, 2008·25 cites·4 claims
- 0678US7818547B2Method and apparatus for efficient resource utilization for prescient instruction prefetchINTEL CORP·Filed 2008·Granted Oct 19, 2010·7 cites·18 claims
- 0778US7657880B2Safe store for speculative helper threadsINTEL CORP·Filed 2003·Granted Feb 2, 2010·26 cites·30 claims
- 0873US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 0949US2024343217A1Energy-efficient collision detection and motion planningUNIV BRITISH COLUMBIA·Filed 2024·Application pending·0 cites
- 1030US2016062916A1Circuit-based apparatuses and methods with probabilistic cache eviction or replacementBOARD TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →