Inventor · disambiguated record
Patrick G. Drennan
Also filed as: DRENNAN PATRICK · DRENNAN PATRICK G
9 granted patents·5 pending applications·85 citations·filing 2000–2025
84Inventor score
Files withFREESCALE SEMICONDUCTOR INC4IC ANALYTICA LLC4QUALCOMM INC2TOKYO ELECTRON US HOLDINGS INC2DRENNAN PATRICK G1
Top patents by PatentIndex Score
14 records- 0181US7171346B1Mismatch modeling toolFREESCALE SEMICONDUCTOR INC·Filed 2000·Granted Jan 30, 2007·46 cites·19 claims
- 0277US6880134B2Method for improving capacitor noise and mismatch constraints in a semiconductor deviceFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Apr 12, 2005·29 cites·19 claims
- 0376US2025315078A1Apparatus and method for implementing a scalable digital infrastructure for measuring ring oscillatorsTOKYO ELECTRON US HOLDINGS INC·Filed 2025·Application pending·0 cites
- 0473US7305643B2Method of tiling analog circuits that include resistors and capacitorsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Dec 4, 2007·5 cites·14 claims
- 0566US9930769B2Thermal metal ground for integrated circuit resistorsQUALCOMM INC·Filed 2014·Granted Mar 27, 2018·2 cites·17 claims
- 0665US12332306B2Apparatus and method for implementing a scalable digital infrastructure for measuring ring oscillatorsTOKYO ELECTRON US HOLDINGS INC·Filed 2022·Granted Jun 17, 2025·0 cites·20 claims
- 0764US12153087B2Apparatus and method for testing all test circuits on a wafer from a single test siteIC ANALYTICA LLC·Filed 2022·Granted Nov 26, 2024·0 cites·15 claims
- 0863US12007429B2Apparatus and method for managing power of test circuitsIC ANALYTICA LLC·Filed 2022·Granted Jun 11, 2024·0 cites·2 claims
- 0959US8281270B2Method and system for proximity-aware circuit designDRENNAN PATRICK G·Filed 2010·Granted Oct 2, 2012·3 cites·20 claims
- 1047US2022415727A1Apparatus and method for setting a precise voltage on test circuitsIC ANALYTICA LLC·Filed 2022·Application pending·0 cites
- 1147US2022415728A1Apparatus and method for probing multiple test circuits in wafer scribe linesIC ANALYTICA LLC·Filed 2022·Application pending·0 cites
- 1242US7305642B2Method of tiling analog circuitsFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Dec 4, 2007·0 cites·7 claims
- 1336US2004193390A1Method and apparatus for rapid evaluation of component mismatch in integrated circuit performanceFiled 2003·Application pending·0 cites
- 1429US2018173288A1Multi power domains to reduce ocv using cpr infrastructureQUALCOMM INC·Filed 2016·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Patrick G. Drennan files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →