Inventor · disambiguated record
Deepak Sabharwal
Also filed as: SABHARWAL DEEPAK
18 granted patents·1 pending application·228 citations·filing 2000–2024
94Inventor score
Top patents by PatentIndex Score
19 records- 0186US7002827B1Methods and apparatuses for a ROM memory array having a virtually grounded lineVIRAGE LOGIC CORP·Filed 2003·Granted Feb 21, 2006·45 cites·18 claims
- 0285US6853572B1Methods and apparatuses for a ROM memory array having twisted source or bit linesVIRAGE LOGIC CORP·Filed 2003·Granted Feb 8, 2005·39 cites·20 claims
- 0383US7692964B1Source-biased SRAM cell with reduced memory cell leakageVIRAGE LOGIC CORP·Filed 2006·Granted Apr 6, 2010·13 cites·15 claims
- 0481US7251186B1Multi-port memory utilizing an array of single-port memory cellsVIRAGE LOGIC CORP·Filed 2005·Granted Jul 31, 2007·15 cites·18 claims
- 0580US7061794B1Wordline-based source-biasing scheme for reducing memory cell leakageVIRAGE LOGIC CORP·Filed 2004·Granted Jun 13, 2006·25 cites·30 claims
- 0678US6738953B1System and method for memory characterizationVIRAGE LOGIC CORP·Filed 2002·Granted May 18, 2004·26 cites·49 claims
- 0774US7298659B1Method and system for accelerated detection of weak bits in an SRAM memory deviceVIRAGE LOGIC CORP·Filed 2005·Granted Nov 20, 2007·10 cites·45 claims
- 0867US6711092B1Semiconductor memory with multiple timing loopsVIRAGE LOGIC CORP·Filed 2002·Granted Mar 23, 2004·15 cites·41 claims
- 0967US6587364B1System and method for increasing performance in a compilable read-only memory (ROM)VIRAGE LOGIC CORP·Filed 2002·Granted Jul 1, 2003·13 cites·21 claims
- 1066US7940550B2Systems and methods for reducing memory array leakage in high capacity memories by selective biasingSYNOPSYS INC·Filed 2009·Granted May 10, 2011·6 cites·21 claims
- 1164US8031542B2Low leakage ROM architectureSYNOPSYS INC·Filed 2010·Granted Oct 4, 2011·2 cites·20 claims
- 1261US6424556B1System and method for increasing performance in a compilable read-only memory (ROM)VIRAGE LOGIC CORP·Filed 2000·Granted Jul 23, 2002·10 cites·16 claims
- 1356US8546251B1Compact read only memory cellSACHAN VINEET KUMAR·Filed 2008·Granted Oct 1, 2013·2 cites·20 claims
- 1454US7376013B2Compact virtual ground diffusion programmable ROM array architecture, system and methodVIRAGE LOGIC CORP·Filed 2006·Granted May 20, 2008·2 cites·27 claims
- 1554US2025112719A1Method and apparatus for quieting transmissions in a communication networkMARVELL ASIA PTE LTD·Filed 2024·Application pending·0 cites
- 1652US7197438B1System and method for memory compiler characterizationVIRAGE LOGIC CORP·Filed 2001·Granted Mar 27, 2007·4 cites·33 claims
- 1744US7929347B2Compact virtual ground diffusion programmable ROM array architecture, system and methodSYNOPSYS INC·Filed 2009·Granted Apr 19, 2011·0 cites·26 claims
- 1843US8031541B1Low leakage ROM architectureSYNOPSYS INC·Filed 2008·Granted Oct 4, 2011·1 cites·13 claims
- 1942US7609550B2Compact virtual ground diffusion programmable ROM array architecture, system and methodVIRAGE LOGIC CORP·Filed 2008·Granted Oct 27, 2009·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →