Inventor · disambiguated record
Michael Stetter
Also filed as: STETTER MICHAEL
9 granted patents·5 pending applications·186 citations·filing 1996–2020
88Inventor score
Top patents by PatentIndex Score
14 records- 0186US6432760B1Method and structure to reduce the damage associated with programming electrical fusesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 13, 2002·44 cites·8 claims
- 0283US7060619B2Reduction of the shear stress in copper via's in organic interlayer dielectric materialINFINEON TECHNOLOGIES AG·Filed 2003·Granted Jun 13, 2006·39 cites·16 claims
- 0381US6559042B2Process for forming fusible linksIBM·Filed 2001·Granted May 6, 2003·33 cites·5 claims
- 0479US6806579B2Robust via structure and methodINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 19, 2004·29 cites·40 claims
- 0574US6638851B2Dual hardmask single damascene integration scheme in an organic low k ILDINFINEON TECHNOLOGIES CORP·Filed 2001·Granted Oct 28, 2003·23 cites·15 claims
- 0652US10565340B2Field-effect transistor placement optimization for improved leaf cell routabilityIBM·Filed 2017·Granted Feb 18, 2020·0 cites·3 claims
- 0750US10394994B2Field-effect transistor placement optimization for improved leaf cell routabilityIBM·Filed 2017·Granted Aug 27, 2019·0 cites·7 claims
- 0850US2022059984A1Driver circuit, method for laser actuation, and ophthalmological laser treatment deviceMERIDIAN AG·Filed 2020·Application pending·0 cites
- 0949US5917193AMethod and apparatus for detecting leaks in a containerFiled 1996·Granted Jun 29, 1999·18 cites·25 claims
- 1036US2004058526A1Via liner integration to avoid resistance shift and resist mechanical stressINFINEON TECHNOLOGIES CORP·Filed 2002·Application pending·0 cites
- 1136US2006073397A1Masking arrangement and method for producing integrated circuit arrangementsFREUND JOHANNES·Filed 2005·Application pending·0 cites
- 1235US2003042580A1Elimination of via-resistance-shift by increasing via size at a last levelFiled 2001·Application pending·0 cites
- 1333US2002155676A1Zero mask MIMcap process for a low k BEOLFiled 2001·Application pending·0 cites
- 1430US6365512B1Method and apparatus for a direct buried strap for same level contact interconnections for semiconductor devicesINFINEON TECHNOLOGIES AG·Filed 2000·Granted Apr 2, 2002·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →