Inventor · disambiguated record
George Bajor
Also filed as: BAJOR GEORGE · BAJOR GEORGE S
22 granted patents·911 citations·filing 1985–2003
97Inventor score
Top patents by PatentIndex Score
22 records- 0192US5504033AMethod for forming recessed oxide isolation containing deep and shallow trenchesHARRIS CORP·Filed 1994·Granted Apr 2, 1996·136 cites·8 claims
- 0291US5668397AHigh frequency analog transistors, method of fabrication and circuit implementationHARRIS CORP·Filed 1993·Granted Sep 16, 1997·95 cites·40 claims
- 0390US4771016AUsing a rapid thermal process for manufacturing a wafer bonded soi semiconductorHARRIS CORP·Filed 1987·Granted Sep 13, 1988·101 cites·21 claims
- 0489US5892264AHigh frequency analog transistors, method of fabrication and circuit implementationHARRIS CORP·Filed 1997·Granted Apr 6, 1999·99 cites·14 claims
- 0586US5744852ABonded waferHARRIS CORP·Filed 1996·Granted Apr 28, 1998·68 cites·8 claims
- 0683US4670970AMethod for making a programmable vertical silicide fuseHARRIS CORP·Filed 1985·Granted Jun 9, 1987·63 cites·19 claims
- 0780US4897362ADouble epitaxial method of fabricating semiconductor devices on bonded wafersHARRIS CORP·Filed 1987·Granted Jan 30, 1990·54 cites·13 claims
- 0878US5807780AHigh frequency analog transistors method of fabrication and circuit implementationHARRIS CORP·Filed 1995·Granted Sep 15, 1998·38 cites·32 claims
- 0976US6798024B1BiCMOS process with low temperature coefficient resistor (TCRL)INTERSIL INC·Filed 2000·Granted Sep 28, 2004·25 cites·18 claims
- 1074US5028973ABipolar transistor with high efficient emitterHARRIS CORP·Filed 1989·Granted Jul 2, 1991·29 cites·11 claims
- 1172US5603779ABonded wafer and method of fabrication thereofHARRIS CORP·Filed 1995·Granted Feb 18, 1997·35 cites·28 claims
- 1272US5382541AMethod for forming recessed oxide isolation containing deep and shallow trenchesHARRIS CORP·Filed 1992·Granted Jan 17, 1995·43 cites·9 claims
- 1369US5933746AProcess of forming trench isolation deviceHARRIS CORP·Filed 1996·Granted Aug 3, 1999·31 cites·9 claims
- 1460US6812108B2BICMOS process with low temperature coefficient resistor (TCRL)INTERSIL CORP·Filed 2003·Granted Nov 2, 2004·9 cites·41 claims
- 1558US5976944AIntegrated circuit with thin film resistors and a method for co-patterning thin film resistors with different compositionsHARRIS CORP·Filed 1997·Granted Nov 2, 1999·18 cites·12 claims
- 1656US4900689AMethod of fabrication of isolated islands for complementary bipolar devicesHARRIS CORP·Filed 1988·Granted Feb 13, 1990·21 cites·17 claims
- 1751US6441447B1Co-patterning thin-film resistors of different compositions with a conductive hard mask and method for sameINTERSIL CORP·Filed 1998·Granted Aug 27, 2002·13 cites·15 claims
- 1851US5633180AMethod of forming P-type islands over P-type buried layerHARRIS CORP·Filed 1995·Granted May 27, 1997·17 cites·19 claims
- 1939US6551897B2Wafer trench article and processINTERSIL INC·Filed 2001·Granted Apr 22, 2003·0 cites·7 claims
- 2038US5395774AMethods for forming a transistor having an emitter with enhanced efficiencyHARRIS CORP·Filed 1993·Granted Mar 7, 1995·9 cites·25 claims
- 2132US6365953B2Wafer trench article and processINTERSIL INC·Filed 1999·Granted Apr 2, 2002·2 cites·6 claims
- 2229US4606936AStress free dielectric isolation technologyHARRIS CORP·Filed 1985·Granted Aug 19, 1986·5 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →