Inventor · disambiguated record
Ta-Chun Lee
Also filed as: LEE TA-CHUN
3 granted patents·1 pending application·28 citations·filing 2009–2012
66Inventor score
Technology areasH10W
Top patents by PatentIndex Score
4 records- 0188US8367473B2Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereofADVANCED SEMICONDUCTOR ENG·Filed 2010·Granted Feb 5, 2013·12 cites·18 claims
- 0284US8399776B2Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and packageAPPELT BERND KARL·Filed 2009·Granted Mar 19, 2013·16 cites·40 claims
- 0343US2010071939A1Substrate of window ball grid array packageCHENG HUNG-HSIANG·Filed 2009·Application pending·0 cites
- 0432US8618677B2Wirebonded semiconductor packageLEE TA-CHUN·Filed 2012·Granted Dec 31, 2013·0 cites·12 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →