Inventor · disambiguated record
Michael C. Rifani
Also filed as: RIFANI MICHAEL · RIFANI MICHAEL C
9 granted patents·2 pending applications·101 citations·filing 2004–2021
88Inventor score
Top patents by PatentIndex Score
11 records- 0188US7308372B2Phase jitter measurement circuitINTEL CORP·Filed 2006·Granted Dec 11, 2007·20 cites·13 claims
- 0285US7038512B2Closed-loop independent DLL-controlled rise/fall time control circuitINTEL CORP·Filed 2004·Granted May 2, 2006·30 cites·59 claims
- 0381US11251171B2Removable interposerINTEL CORP·Filed 2018·Granted Feb 15, 2022·4 cites·25 claims
- 0480US7024324B2Delay element calibrationINTEL CORP·Filed 2004·Granted Apr 4, 2006·24 cites·30 claims
- 0578US7386749B2Controlling sequence of clock distribution to clock distribution domainsINTEL CORP·Filed 2005·Granted Jun 10, 2008·9 cites·36 claims
- 0675US10025343B2Data transfer between asynchronous clock domainsRIFANI MICHAEL C·Filed 2011·Granted Jul 17, 2018·5 cites·21 claims
- 0770US10353146B2Flexible and stretchable optical interconnect in wearable systemsINTEL CORP·Filed 2017·Granted Jul 16, 2019·1 cites·19 claims
- 0858US7038513B2Closed-loop independent DLL-controlled rise/fall time control circuitINTEL CORP·Filed 2004·Granted May 2, 2006·8 cites·34 claims
- 0956US10599178B2Data transfer between asynchronous clock domainsINTEL CORP·Filed 2018·Granted Mar 24, 2020·0 cites·17 claims
- 1041US2022011795A1Control Apparatus, Device, Method and Computer Program for Determining a Device-Specific Supply Voltage for a Semiconductor DeviceINTEL CORP·Filed 2021·Application pending·0 cites
- 1135US2007159223A1Phase locked loop circuitWANG FENG·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →