Inventor · disambiguated record
Vikram Santurkar
Also filed as: SANTURKAR VIKRAM · SANTURKAR VIKRAM S
25 granted patents·1 pending application·342 citations·filing 1999–2014
96Inventor score
Top patents by PatentIndex Score
26 records- 0197US7443193B1Techniques for providing calibrated parallel on-chip termination impedanceALTERA CORP·Filed 2006·Granted Oct 28, 2008·49 cites·23 claims
- 0294US7410293B1Techniques for sensing temperature and automatic calibration on integrated circuitsALTERA CORP·Filed 2006·Granted Aug 12, 2008·57 cites·20 claims
- 0393US7355440B1Method of reducing leakage current using sleep transistors in programmable logic deviceALTERA CORP·Filed 2005·Granted Apr 8, 2008·23 cites·19 claims
- 0492US7423450B2Techniques for providing calibrated on-chip termination impedanceALTERA CORP·Filed 2006·Granted Sep 9, 2008·22 cites·47 claims
- 0591US7218133B2Versatile logic element and logic array blockALTERA CORP·Filed 2005·Granted May 15, 2007·16 cites·6 claims
- 0690US6965249B2Programmable logic device with redundant circuitryALTERA CORP·Filed 2002·Granted Nov 15, 2005·39 cites·109 claims
- 0788US7518399B1Method of reducing leakage current using sleep transistors in programmable logic deviceALTERA CORP·Filed 2008·Granted Apr 14, 2009·13 cites·20 claims
- 0888US6937064B1Versatile logic element and logic array blockALTERA CORP·Filed 2002·Granted Aug 30, 2005·26 cites·42 claims
- 0986US8004308B2Techniques for providing calibrated on-chip termination impedanceALTERA CORP·Filed 2010·Granted Aug 23, 2011·6 cites·20 claims
- 1085US9509307B1Interconnect multiplexers and methods of reducing contention currents in an interconnect multiplexerXILINX INC·Filed 2014·Granted Nov 29, 2016·7 cites·14 claims
- 1185US7719309B2Techniques for providing calibrated on-chip termination impedanceALTERA CORP·Filed 2008·Granted May 18, 2010·10 cites·23 claims
- 1280US7391229B1Techniques for serially transmitting on-chip termination control signalsALTERA CORP·Filed 2006·Granted Jun 24, 2008·8 cites·24 claims
- 1379US9166584B1Current-encoded signalingXILINX INC·Filed 2014·Granted Oct 20, 2015·6 cites·17 claims
- 1477US7432734B2Versatile logic element and logic array blockALTERA CORP·Filed 2007·Granted Oct 7, 2008·6 cites·14 claims
- 1572US7999568B1Techniques for serially transmitting on-chip termination control signalsALTERA CORP·Filed 2008·Granted Aug 16, 2011·4 cites·20 claims
- 1671US7855574B2Programmable multiple supply regions with switched pass gate level convertersALTERA CORP·Filed 2006·Granted Dec 21, 2010·7 cites·23 claims
- 1768US6201747B1Method and apparatus for measuring subthreshold current in a memory arrayADVANCED MICRO DEVICES INC·Filed 1999·Granted Mar 13, 2001·26 cites·15 claims
- 1864US8330501B1Dual mode rail-to-rail buffer for low voltage memorySANTURKAR VIKRAM·Filed 2010·Granted Dec 11, 2012·4 cites·16 claims
- 1957US7884638B1Techniques for providing calibrated on-chip termination impedanceALTERA CORP·Filed 2008·Granted Feb 8, 2011·2 cites·21 claims
- 2055US7639042B2Methods of reducing power in programmable logic devices using low voltage swing for routing signalsALTERA CORP·Filed 2007·Granted Dec 29, 2009·2 cites·19 claims
- 2154US6720796B1Multiple size memories in a programmable logic deviceALTERA CORP·Filed 2002·Granted Apr 13, 2004·5 cites·16 claims
- 2249US7262634B2Methods of reducing power in programmable logic devices using low voltage swing for routing signalsALTERA CORP·Filed 2005·Granted Aug 28, 2007·1 cites·18 claims
- 2347US7671626B1Versatile logic element and logic array blockALTERA CORP·Filed 2008·Granted Mar 2, 2010·0 cites·20 claims
- 2443US6298007B1Method and apparatus for eliminating false data in a page mode memory deviceADVANCED MICRO DEVICES INC·Filed 2000·Granted Oct 2, 2001·3 cites·15 claims
- 2537US7161381B1Multiple size memories in a programmable logic deviceALTERA CORP·Filed 2004·Granted Jan 9, 2007·0 cites·20 claims
- 2626US2007008004A1Apparatus and methods for low-power routing circuitry in programmable logic devicesSANTURKAR VIKRAM·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →