Inventor · disambiguated record
Praful Jain
Also filed as: JAIN PRAFUL
15 granted patents·4 pending applications·82 citations·filing 2012–2023
92Inventor score
Top patents by PatentIndex Score
19 records- 0198US11961823B1Forming and/or configuring stacked diesXILINX INC·Filed 2021·Granted Apr 16, 2024·8 cites·7 claims
- 0293US11043480B1Forming and/or configuring stacked diesXILINX INC·Filed 2019·Granted Jun 22, 2021·9 cites·18 claims
- 0392US9281807B1Master-slave flip-flops and methods of implementing master-slave flip-flops in an integrated circuitXILINX INC·Filed 2014·Granted Mar 8, 2016·12 cites·17 claims
- 0491US9054684B1Single event upset enhanced architectureXILINX INC·Filed 2013·Granted Jun 9, 2015·12 cites·7 claims
- 0588US11041211B2Power distribution for active-on-active die stack with reduced resistanceXILINX INC·Filed 2018·Granted Jun 22, 2021·5 cites·20 claims
- 0686US11270977B2Power delivery network for active-on-active stacked integrated circuitsXILINX INC·Filed 2019·Granted Mar 8, 2022·4 cites·20 claims
- 0786US9484919B1Selection of logic paths for redundancyXILINX INC·Filed 2014·Granted Nov 1, 2016·7 cites·20 claims
- 0884US10908598B1Integrated circuits designed for multiple sets of criteriaXILINX INC·Filed 2019·Granted Feb 2, 2021·2 cites·17 claims
- 0982US9483599B1Circuit design-specific failure in time rate for single event upsetsXILINX INC·Filed 2014·Granted Nov 1, 2016·6 cites·18 claims
- 1080US9183338B1Single-event upset mitigation in circuit design for programmable integrated circuitsXILINX INC·Filed 2014·Granted Nov 10, 2015·5 cites·20 claims
- 1178US9825632B1Circuit for and method of preventing multi-bit upsets induced by single event transientsXILINX INC·Filed 2016·Granted Nov 21, 2017·3 cites·16 claims
- 1277US9628081B2Interconnect circuits having low threshold voltage P-channel transistors for a programmable integrated circuitXILINX INC·Filed 2014·Granted Apr 18, 2017·4 cites·19 claims
- 1373US9000529B1Reduction of single event upsets within a semiconductor integrated circuitXILINX INC·Filed 2012·Granted Apr 7, 2015·3 cites·18 claims
- 1463US11670585B1Power distribution for active-on-active die stack with reduced resistanceXILINX INC·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 1561US9236353B2Integrated circuit having improved radiation immunityXILINX INC·Filed 2012·Granted Jan 12, 2016·2 cites·17 claims
- 1658US2024429145A1Building multi-die fpgas using chip-on-wafer technologyXILINX INC·Filed 2023·Application pending·0 cites
- 1751US2019167386A1Smart orthodontic bracketRAGHAVAN SREEVATSAN·Filed 2019·Application pending·0 cites
- 1847US2025036848A1Systems and methods for machine learning based voltage drop prediction for a 3d stacked deviceXILINX INC·Filed 2023·Application pending·0 cites
- 1942US2018008378A1Smart orthodontic bracketRAGHAVAN SREEVATSAN·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →