Inventor · disambiguated record
Chang-Fen Hu
Also filed as: HU CHANG-FEN
11 granted patents·2 pending applications·37 citations·filing 2003–2025
86Inventor score
Top patents by PatentIndex Score
13 records- 0195US11967958B2Driving buffer with configurable slew rate for data transmissionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Apr 23, 2024·4 cites·20 claims
- 0292US11646313B2Semiconductor and circuit structures, and related methodsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted May 9, 2023·2 cites·20 claims
- 0389US12470205B2Driving buffer with configurable slew rate for data transmissionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Nov 11, 2025·1 cites·20 claims
- 0488US2025364979A1Driving buffer with configurable slew rate for data transmissionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0582US6949967B2Dynamically adjustable decoupling capacitance to reduce gate leakage currentTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Sep 27, 2005·20 cites·31 claims
- 0678US12265412B2Low dropout regulator circuits, input/output device, and methods for operating a low dropout regulatorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Apr 1, 2025·0 cites·19 claims
- 0775US12272691B2Semiconductor and circuit structures, and related methodsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Apr 8, 2025·0 cites·20 claims
- 0873US2025199556A1Low dropout regulator circuits, input/output device, and methods for operating a low dropout regulatorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0970US11966241B2Low dropout regulator circuits, input/output device, and methods for operating a low dropout regulatorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Apr 23, 2024·0 cites·20 claims
- 1062US9117678B2Semiconductor devicesTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 25, 2015·1 cites·19 claims
- 1154US7062740B2System and method for reducing design cycle time for designing input/output cellsTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jun 13, 2006·3 cites·28 claims
- 1249US7500214B2System and method for reducing design cycle time for designing input/output cellsTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Mar 3, 2009·0 cites·20 claims
- 1348US7158357B2Capacitor design in ESD circuits for eliminating current leakageTAIWAN SEMICONDUCTOR MFG XO LT·Filed 2004·Granted Jan 2, 2007·6 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →