Inventor · disambiguated record
Dietmar Petras
Also filed as: PETRAS DIETMAR
12 granted patents·1 pending application·102 citations·filing 2002–2024
90Inventor score
Top patents by PatentIndex Score
13 records- 0186US10180896B2System and method of debugging multi-threaded processesSYNOPSYS INC·Filed 2016·Granted Jan 15, 2019·5 cites·16 claims
- 0284US8683444B1System and method of debugging multi-threaded processesSPYCHER MATTHIAS·Filed 2007·Granted Mar 25, 2014·21 cites·26 claims
- 0379US10445445B2Sliding time window control mechanism for parallel execution of multiple processor core models in a virtual platform simulationSYNOPSYS INC·Filed 2017·Granted Oct 15, 2019·5 cites·18 claims
- 0479US9317636B1System and method for stopping integrated circuit simulationPETRAS DIETMAR·Filed 2006·Granted Apr 19, 2016·12 cites·20 claims
- 0579US8423959B1Techniques for coordinating and controlling debuggers in a simulation environmentPETRAS DIETMAR·Filed 2006·Granted Apr 16, 2013·10 cites·11 claims
- 0678US8397220B1Simulation control techniquesPHILIPP THOMAS·Filed 2008·Granted Mar 12, 2013·11 cites·16 claims
- 0775US7443830B2Method for data communication and controlling device thereforERICSSON AB·Filed 2002·Granted Oct 28, 2008·28 cites·27 claims
- 0873US9201708B2Direct memory interface access in a multi-thread safe system level modeling simulationSYNOPSYS INC·Filed 2013·Granted Dec 1, 2015·4 cites·20 claims
- 0970US9459992B2System and method of debugging multi-threaded processesSYNOPSYS INC·Filed 2014·Granted Oct 4, 2016·2 cites·19 claims
- 1063US8972944B2Coordinating and controlling debuggers in a simulation environmentSYNOPSYS INC·Filed 2013·Granted Mar 3, 2015·1 cites·18 claims
- 1163US8856756B2Simulation control techniquesSYNOPSYS INC·Filed 2013·Granted Oct 7, 2014·1 cites·20 claims
- 1259US8914274B1Method and system for instruction set simulation with concurrent attachment of multiple debuggersPETRAS DIETMAR·Filed 2006·Granted Dec 16, 2014·2 cites·14 claims
- 1358US2025383907A1Virtual machine execution with heterogenous host and virtual machine instruction set architecturesSYNOPSYS INC·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →