Inventor · disambiguated record
Ping-Sheng Tseng
Also filed as: TSENG PING-SHENG
19 granted patents·2 pending applications·2,061 citations·filing 1995–2020
97Inventor score
Technology areasG06F
Top patents by PatentIndex Score
21 records- 0198US6810442B1Memory mapping system and methodAXIS SYSTEMS INC·Filed 2001·Granted Oct 26, 2004·272 cites·28 claims
- 0296US6785873B1Emulation system with multiple asynchronous clocksAXIS SYSTEMS INC·Filed 2000·Granted Aug 31, 2004·172 cites·20 claims
- 0395US6389379B1Converification system and methodAXIS SYSTEMS INC·Filed 1998·Granted May 14, 2002·279 cites·17 claims
- 0493US7512728B2Inter-chip communication systemAXIS SYSTEMS INC·Filed 2004·Granted Mar 31, 2009·78 cites·19 claims
- 0593US6651225B1Dynamic evaluation logic system and methodAXIS SYSTEMS INC·Filed 2000·Granted Nov 18, 2003·151 cites·20 claims
- 0693US6009256ASimulation/emulation system and methodAXIS SYSTEMS INC·Filed 1997·Granted Dec 28, 1999·261 cites·45 claims
- 0792US11308008B1Systems and methods for handling DPI messages outgoing from an emulator systemCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Apr 19, 2022·6 cites·20 claims
- 0891US6321366B1Timing-insensitive glitch-free logic system and methodAXIS SYSTEMS INC·Filed 1998·Granted Nov 20, 2001·206 cites·21 claims
- 0990US9195784B2Common shared memory in a verification systemTSENG PING-SHENG·Filed 2011·Granted Nov 24, 2015·23 cites·50 claims
- 1090US6134516ASimulation server system and methodAXIS SYSTEMS INC·Filed 1998·Granted Oct 17, 2000·196 cites·27 claims
- 1190US6026230AMemory simulation system and methodAXIS SYSTEMS INC·Filed 1998·Granted Feb 15, 2000·177 cites·20 claims
- 1286US7480606B2VCD-on-demand system and methodVERSITY DESIGN INC·Filed 2005·Granted Jan 20, 2009·40 cites·18 claims
- 1382US9026966B1Co-simulation methodology to address performance and runtime challenges of gate level simulations with, SDF timing using emulatorsRAMACHANDRAN NARESH·Filed 2014·Granted May 5, 2015·24 cites·16 claims
- 1482US8244512B1Method and apparatus for simulating a circuit using timing insensitive glitch-free (TIGF) logicTSENG PING-SHENG·Filed 2001·Granted Aug 14, 2012·32 cites·28 claims
- 1577US5809283ASimulator for simulating systems including mixed triggersSYNOPSYS INC·Filed 1995·Granted Sep 15, 1998·86 cites·19 claims
- 1669US7991605B1Method and apparatus for translating a verification process having recursion for implementation in a logic emulatorCADENCE DESIGN SYSTEMS INC·Filed 2008·Granted Aug 2, 2011·4 cites·20 claims
- 1763US8161439B2Method and apparatus for processing assertions in assertion-based verification of a logic designLIM AMY·Filed 2008·Granted Apr 17, 2012·5 cites·20 claims
- 1863US8161502B2Method and apparatus for implementing a task-based interface in a logic verification systemPENG SONG·Filed 2008·Granted Apr 17, 2012·3 cites·20 claims
- 1961US5784593ASimulator including process levelizationSYNOPSYS INC·Filed 1995·Granted Jul 21, 1998·46 cites·16 claims
- 2043US2002152060A1Inter-chip communication systemFiled 2001·Application pending·0 cites
- 2138US2006117274A1Behavior processor system and methodTSENG PING-SHENG·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →