Inventor · disambiguated record
Stephen H. Chan
Also filed as: CHAN STEPHEN · CHAN STEPHEN H
15 granted patents·3 pending applications·247 citations·filing 1991–2021
93Inventor score
Top patents by PatentIndex Score
18 records- 0193US11367188B2Dental image synthesis using generative adversarial networks with semantic activation blocksRetrace Labs·Filed 2020·Granted Jun 21, 2022·5 cites·20 claims
- 0286US11348237B2Artificial intelligence architecture for identification of periodontal featuresRetrace Labs·Filed 2020·Granted May 31, 2022·3 cites·18 claims
- 0379US7853773B1Program memory space expansion for particular processor instructionsMAXIM INTEGRATED PRODUCTS·Filed 2009·Granted Dec 14, 2010·7 cites·19 claims
- 0475US5278957AData transfer circuit for interfacing two bus systems that operate asynchronously with respect to each otherZILOG INC·Filed 1991·Granted Jan 11, 1994·72 cites·30 claims
- 0568US8751459B2Method and system to analyze email addressesCHAN STEPHEN·Filed 2012·Granted Jun 10, 2014·3 cites·19 claims
- 0660US6574682B1Data flow enhancement for processor architectures with cacheZILOG INC·Filed 1999·Granted Jun 3, 2003·36 cites·39 claims
- 0759US7269710B1Program memory space expansion for particular processor instructionsZILOG INC·Filed 2004·Granted Sep 11, 2007·5 cites·32 claims
- 0858US2005021527A1System for resource accounting for multiple entities in an arbitrary value chainFiled 2003·Application pending·0 cites
- 0955US5592635ATechnique for accelerating instruction decoding of instruction sets with variable length opcodes in a pipeline microprocessorZILOG INC·Filed 1994·Granted Jan 7, 1997·23 cites·31 claims
- 1052US7509478B1Program memory space expansion for particular processor instructionsZILOG INC·Filed 2007·Granted Mar 24, 2009·0 cites·8 claims
- 1152US5317745AMinimal interrupt latency scheme using multiple program countersZILOG INC·Filed 1992·Granted May 31, 1994·23 cites·14 claims
- 1251US5619681ADelayed FIFO status for serial shift emulationZILOG INC·Filed 1993·Granted Apr 8, 1997·27 cites·15 claims
- 1349US5381453AEfficient functional test scheme incorporated in a programmable duration binary counterZILOG INC·Filed 1994·Granted Jan 10, 1995·13 cites·32 claims
- 1446US5313621AProgrammable wait states generator for a microprocessor and computer system utilizing itZILOG INC·Filed 1993·Granted May 17, 1994·19 cites·5 claims
- 1543US2021358604A1Interface For Generating Workflows Operating On Processing Dental Information From Artificial IntelligenceRetrace Labs·Filed 2021·Application pending·0 cites
- 1640US2020051153A1Comparative ranking systemCARGURUS INC·Filed 2018·Application pending·0 cites
- 1736US5734854AFast instruction decoding in a pipeline processorZILOG INC·Filed 1997·Granted Mar 31, 1998·7 cites·4 claims
- 1835US5860013AFlexible interrupt system for an integrated circuitZILOG INC·Filed 1996·Granted Jan 12, 1999·4 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →