Inventor · disambiguated record
John G. Gaudiello
Also filed as: GAUDIELLO JOHN G · GAUDIELLO JOHN GERARD
29 granted patents·1,378 citations·filing 1994–2020
97Inventor score
Files withIBM29
Top patents by PatentIndex Score
29 records- 0198US6153935ADual etch stop/diffusion barrier for damascene interconnectsIBM·Filed 1999·Granted Nov 28, 2000·376 cites·22 claims
- 0297US6358832B1Method of forming barrier layers for damascene interconnectsIBM·Filed 2000·Granted Mar 19, 2002·119 cites·27 claims
- 0397US6335104B1Method for preparing a conductive pad for electrical connection and conductive pad formedIBM·Filed 2000·Granted Jan 1, 2002·155 cites·45 claims
- 0496US6323128B1Method for forming Co-W-P-Au filmsIBM·Filed 1999·Granted Nov 27, 2001·292 cites·20 claims
- 0595US5616422AMetallized substrateIBM·Filed 1995·Granted Apr 1, 1997·110 cites·9 claims
- 0693US9985097B2Integrated capacitors with nanosheet transistorsIBM·Filed 2016·Granted May 29, 2018·7 cites·8 claims
- 0790US6646345B2Method for forming Co-W-P-Au filmsIBM·Filed 2001·Granted Nov 11, 2003·45 cites·5 claims
- 0890US6162365APd etch mask for copper circuitizationIBM·Filed 1998·Granted Dec 19, 2000·80 cites·23 claims
- 0986US10170548B2Integrated capacitors with nanosheet transistorsIBM·Filed 2018·Granted Jan 1, 2019·3 cites·20 claims
- 1084US7699996B2Sidewall image transfer processes for forming multiple line-widthsIBM·Filed 2007·Granted Apr 20, 2010·9 cites·20 claims
- 1180US7007378B2Process for manufacturing a printed wiring boardIBM·Filed 2002·Granted Mar 7, 2006·23 cites·5 claims
- 1276US6519845B1Wire bonding to dual metal covered pad surfacesIBM·Filed 2000·Granted Feb 18, 2003·20 cites·13 claims
- 1373US6759597B1Wire bonding to dual metal covered pad surfacesIBM·Filed 1998·Granted Jul 6, 2004·36 cites·6 claims
- 1471US7015469B2Electron holography methodIBM·Filed 2004·Granted Mar 21, 2006·8 cites·5 claims
- 1570US7932167B2Phase change memory cell with vertical transistorIBM·Filed 2007·Granted Apr 26, 2011·7 cites·18 claims
- 1670US6395164B1Copper seed layer repair technique using electroless touch-upIBM·Filed 1999·Granted May 28, 2002·36 cites·3 claims
- 1766US7651902B2Hybrid substrates and methods for forming such hybrid substratesIBM·Filed 2007·Granted Jan 26, 2010·2 cites·7 claims
- 1866US7560692B2Method of TEM sample preparation for electron holography for semiconductor devicesIBM·Filed 2006·Granted Jul 14, 2009·2 cites·10 claims
- 1966US6042889AMethod for electrolessly depositing a metal onto a substrate using mediator ionsIBM·Filed 1994·Granted Mar 28, 2000·18 cites·7 claims
- 2064US11244869B2Fabrication of logic devices and power devices on the same substrateIBM·Filed 2020·Granted Feb 8, 2022·0 cites·20 claims
- 2164US10943902B2Forming strained channels for CMOS device fabricationIBM·Filed 2019·Granted Mar 9, 2021·0 cites·14 claims
- 2264US10756088B2Method and structure of forming strained channels for CMOS device fabricationIBM·Filed 2019·Granted Aug 25, 2020·0 cites·11 claims
- 2360US10593672B2Method and structure of forming strained channels for CMOS device fabricationIBM·Filed 2018·Granted Mar 17, 2020·0 cites·14 claims
- 2458US7214935B2Transmission electron microscopy sample preparation method for electron holographyIBM·Filed 2004·Granted May 8, 2007·3 cites·17 claims
- 2554US5562760APlating bath, and corresponding method, for electrolessly depositing a metal onto a substrate, and resulting metallized substrateIBM·Filed 1995·Granted Oct 8, 1996·14 cites·12 claims
- 2653US10685886B2Fabrication of logic devices and power devices on the same substrateIBM·Filed 2017·Granted Jun 16, 2020·0 cites·13 claims
- 2749US6086946AMethod for electroless gold deposition in the presence of a palladium seeder and article produced therebyIBM·Filed 1997·Granted Jul 11, 2000·11 cites·14 claims
- 2848US6383617B1Method for electroless gold deposition in the presence of a palladium seeder and article produced therebyIBM·Filed 2000·Granted May 7, 2002·2 cites·6 claims
- 2946US7750406B2Design structure incorporating a hybrid substrateIBM·Filed 2007·Granted Jul 6, 2010·0 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →