Inventor · disambiguated record
Reinhard Pufall
Also filed as: PUFALL REINHARD
8 granted patents·1 pending application·15 citations·filing 2003–2022
77Inventor score
Top patents by PatentIndex Score
9 records- 0186US6993455B2Method for determining the construction of a mask for the micropatterning of semiconductor substrates by means of photolithographyINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jan 31, 2006·12 cites·27 claims
- 0268US9627305B2Semiconductor module with interlocked connectionINFINEON TECHNOLOGIES AG·Filed 2013·Granted Apr 18, 2017·3 cites·3 claims
- 0355US12406940B2Semiconductor chip having a crack stop structureINFINEON TECHNOLOGIES AG·Filed 2022·Granted Sep 2, 2025·0 cites·13 claims
- 0449US9576867B2Device comprising a ductile layer and method of making the sameINFINEON TECHNOLOGIES AG·Filed 2016·Granted Feb 21, 2017·0 cites·21 claims
- 0549US9331019B2Device comprising a ductile layer and method of making the sameINFINEON TECHNOLOGIES AG·Filed 2012·Granted May 3, 2016·0 cites·17 claims
- 0644US10734352B2Metallic interconnect, a method of manufacturing a metallic interconnect, a semiconductor arrangement and a method of manufacturing a semiconductor arrangementINFINEON TECHNOLOGIES AG·Filed 2018·Granted Aug 4, 2020·0 cites·21 claims
- 0744US10090216B2Semiconductor package with interlocked connectionINFINEON TECHNOLOGIES AG·Filed 2017·Granted Oct 2, 2018·0 cites·6 claims
- 0841US2015115442A1Redistribution layer and method of forming a redistribution layerINFINEON TECHNOLOGIES AG·Filed 2013·Application pending·0 cites
- 0934US7183022B2Method for producing a mask set for lithography including at least one mask and methods for imaging structures of a predetermined layout into a common exposure planeINFINEON TECHNOLGIES AG·Filed 2003·Granted Feb 27, 2007·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →