Inventor · disambiguated record
James W. Alexander
Also filed as: ALEXANDER JAMES · ALEXANDER JAMES W · ALEXANDER JAMES W (JIMBO)
39 granted patents·5 pending applications·713 citations·filing 1992–2016
98Inventor score
Top patents by PatentIndex Score
44 records- 0196US7644347B2Silent data corruption mitigation using error correction code with embedded signaling fault detectionINTEL CORP·Filed 2005·Granted Jan 5, 2010·84 cites·19 claims
- 0295US6540123B1Pickup truck bed extender apparatusJAC PRODUCTS INC·Filed 2000·Granted Apr 1, 2003·82 cites·15 claims
- 0393US6513688B2Pickup truck bed extender apparatusJAC PRODUCTS INC·Filed 2001·Granted Feb 4, 2003·65 cites·18 claims
- 0492US7734980B2Mitigating silent data corruption in a buffered memory module architectureINTEL CORP·Filed 2005·Granted Jun 8, 2010·30 cites·27 claims
- 0589US7804733B2System and method for memory phase sheddingINTEL CORP·Filed 2007·Granted Sep 28, 2010·22 cites·13 claims
- 0688US5392186AProviding various electrical protections to a CMOS integrated circuitINTEL CORP·Filed 1992·Granted Feb 21, 1995·54 cites·12 claims
- 0786US7587625B2Memory replay mechanismINTEL CORP·Filed 2006·Granted Sep 8, 2009·19 cites·30 claims
- 0885US9588823B2Adjustment of execution of tasksINTEL CORP·Filed 2014·Granted Mar 7, 2017·8 cites·25 claims
- 0982US5434804AMethod and apparatus for synchronizing a JTAG test control signal to an on-chip clock signalINTEL CORP·Filed 1993·Granted Jul 18, 1995·115 cites·23 claims
- 1080US7444479B2Fully buffered DIMM read data substitution for write acknowledgementALEXANDER JAMES W·Filed 2005·Granted Oct 28, 2008·10 cites·19 claims
- 1179US9292465B2Dynamic link width adjustmentTRIVEDI MALAY·Filed 2011·Granted Mar 22, 2016·7 cites·19 claims
- 1279US7200787B2Memory channel utilizing permuting status patternsINTEL CORP·Filed 2003·Granted Apr 3, 2007·24 cites·32 claims
- 1378US9927857B2Profiling a job power and energy consumption for a data processing systemINTEL CORP·Filed 2014·Granted Mar 27, 2018·3 cites·22 claims
- 1478US8438410B2Memory power management via dynamic memory operation statesDAVID HOWARD S·Filed 2010·Granted May 7, 2013·5 cites·26 claims
- 1577US9575536B2Methods and apparatus to estimate power performance of a job that runs on multiple nodes of a distributed computer systemRAJAPPA MURALIDHAR·Filed 2014·Granted Feb 21, 2017·4 cites·17 claims
- 1675US5383192AMinimizing the likelihood of slip between the instant a candidate for a break event is generated and the instant a microprocessor is instructed to perform a break, without missing breakpointsINTEL CORP·Filed 1992·Granted Jan 17, 1995·67 cites·4 claims
- 1774US10073659B2Power management circuit with per activity weighting and multiple throttle down thresholdsINTEL CORP·Filed 2015·Granted Sep 11, 2018·2 cites·20 claims
- 1874US9921633B2Power aware job scheduler and manager for a data processing systemINTEL CORP·Filed 2014·Granted Mar 20, 2018·2 cites·21 claims
- 1974US7516349B2Synchronized memory channels with unidirectional linksINTEL CORP·Filed 2005·Granted Apr 7, 2009·6 cites·17 claims
- 2073US9568978B2Controlling power consumption in processor-based systems and components thereofINTEL CORP·Filed 2013·Granted Feb 14, 2017·3 cites·27 claims
- 2172US8935578B2Method and apparatus for optimizing power and latency on a linkINTEL CORP·Filed 2012·Granted Jan 13, 2015·2 cites·30 claims
- 2271US7509560B2Mechanism for adjacent-symbol error correction and detectionINTEL CORP·Filed 2003·Granted Mar 24, 2009·16 cites·20 claims
- 2368US9195404B2Exposing protected memory addressesALEXANDER JAMES W·Filed 2013·Granted Nov 24, 2015·2 cites·20 claims
- 2463US6615379B1Method and apparatus for testing a logic deviceINTEL CORP·Filed 1999·Granted Sep 2, 2003·24 cites·12 claims
- 2560US10289183B2Methods and apparatus to manage jobs that can and cannot be suspended when there is a change in power allocation to a distributed computer systemINTEL CORP·Filed 2014·Granted May 14, 2019·0 cites·14 claims
- 2658US10712796B2Method and apparatus to generate and use power, thermal and performance characteristics of nodes to improve energy efficiency and reducing wait time for jobs in the queueINTEL CORP·Filed 2014·Granted Jul 14, 2020·0 cites·20 claims
- 2757US7865753B2Resource power controller to return a resource to an up state based on an estimate of a size of a gap in data trafficINTEL CORP·Filed 2007·Granted Jan 4, 2011·1 cites·30 claims
- 2856US8661284B2Method and system to improve the operations of a registered memory moduleALEXANDER JAMES W·Filed 2013·Granted Feb 25, 2014·1 cites·6 claims
- 2956US7885914B2Systems, methods and apparatuses for rank coordinationINTEL CORP·Filed 2007·Granted Feb 8, 2011·2 cites·20 claims
- 3053US7941618B2Fully buffered DIMM read data substitution for write acknowledgementINTEL CORP·Filed 2008·Granted May 10, 2011·0 cites·13 claims
- 3152US10037069B2Dynamic link width modulationINTEL CORP·Filed 2016·Granted Jul 31, 2018·0 cites·26 claims
- 3249US8375241B2Method and system to improve the operations of a registered memory moduleINTEL CORP·Filed 2009·Granted Feb 12, 2013·1 cites·6 claims
- 3347US8719606B2Optimizing performance and power consumption during memory power down stateLAM SON H·Filed 2008·Granted May 6, 2014·1 cites·21 claims
- 3447US2009172440A1Coupled low power state entry and exit for links and memoryKANT KRISHNA·Filed 2007·Application pending·0 cites
- 3547US2009172441A1Hardware proactive implementation for active mode power control of platform resourcesKANT KRISHNA·Filed 2007·Application pending·0 cites
- 3645US8429367B2Systems, methods and apparatuses for clock enable (CKE) coordinationALEXANDER JAMES W·Filed 2007·Granted Apr 23, 2013·1 cites·16 claims
- 3744US5758059AIn-circuit emulator in which abrupt and deferred arming and disarming of several events on a microprocessor chip are controlled using a single-input pinINTEL CORP·Filed 1995·Granted May 26, 1998·16 cites·13 claims
- 3844US2008005378A1Chipset determinism for improved validationINTEL CORP·Filed 2006·Application pending·0 cites
- 3943US9280194B2Dynamic link width modulationABOU GAZALA NEVEN M·Filed 2012·Granted Mar 8, 2016·0 cites·21 claims
- 4043US5513338AApparatus for tracing activity on a bus of an in-circuit emulatorINTEL CORP·Filed 1993·Granted Apr 30, 1996·20 cites·24 claims
- 4142US2007089032A1Memory system anti-aliasing schemeINTEL CORP·Filed 2005·Application pending·0 cites
- 4241US8327222B2Mechanism for adjacent-symbol error correction and detectionALEXANDER JAMES W·Filed 2009·Granted Dec 4, 2012·0 cites·20 claims
- 4339US5497456AApparatus for transferring information between an interrupt producer and an interrupt service environmentINTEL CORP·Filed 1995·Granted Mar 5, 1996·14 cites·15 claims
- 4437US2010169729A1Enabling an integrated memory controller to transparently work with defective memory devicesDATTA SHAMANNA M·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →