Inventor · disambiguated record
Kent D. Moat
Also filed as: MOAT KENT D · MOAT KENT DONALD
15 granted patents·1 pending application·297 citations·filing 2002–2008
94Inventor score
Top patents by PatentIndex Score
16 records- 0192US7159099B2Streaming vector processor with reconfigurable interconnection switchMOTOROLA INC·Filed 2002·Granted Jan 2, 2007·76 cites·20 claims
- 0289US7945768B2Method and apparatus for nested instruction looping using implicit predicatesMOTOROLA MOBILITY INC·Filed 2008·Granted May 17, 2011·25 cites·18 claims
- 0386US7275148B2Data processing system using multiple addressing modes for SIMD operations and method thereofFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Sep 25, 2007·47 cites·21 claims
- 0485US7801079B2Method and apparatus for battery-aware dynamic bandwidth allocation for groups of wireless sensor nodes in a wireless sensor networkMOTOROLA INC·Filed 2007·Granted Sep 21, 2010·13 cites·20 claims
- 0584US7140019B2Scheduler of program instructions for streaming vector processor having interconnected functional unitsMOTOROLA INC·Filed 2002·Granted Nov 21, 2006·41 cites·24 claims
- 0678US7100019B2Method and apparatus for addressing a vector of elements in a partitioned memory using stride, skip and span valuesMOTOROLA INC·Filed 2003·Granted Aug 29, 2006·23 cites·25 claims
- 0775US7246203B2Queuing cache for vectors with elements in predictable orderMOTOROLA INC·Filed 2004·Granted Jul 17, 2007·20 cites·20 claims
- 0873US6934938B2Method of programming linear graphs for streaming vector computationMOTOROLA INC·Filed 2002·Granted Aug 23, 2005·19 cites·18 claims
- 0964US7502909B2Memory address generation with non-harmonic indexingMOTOROLA INC·Filed 2005·Granted Mar 10, 2009·3 cites·24 claims
- 1063US7290122B2Dataflow graph compression for power reduction in a vector processorMOTOROLA INC·Filed 2003·Granted Oct 30, 2007·9 cites·8 claims
- 1159US6799261B2Memory interface with fractional addressingMOTOROLA INC·Filed 2002·Granted Sep 28, 2004·8 cites·25 claims
- 1258US6850536B2Interconnection device with integrated storageMOTOROLA INC·Filed 2002·Granted Feb 1, 2005·5 cites·20 claims
- 1355US7415601B2Method and apparatus for elimination of prolog and epilog instructions in a vector processor using data validity tags and sink countersMOTOROLA INC·Filed 2003·Granted Aug 19, 2008·4 cites·17 claims
- 1453US7219209B2Bus filter for memory address translationMOTOROLA INC·Filed 2003·Granted May 15, 2007·3 cites·25 claims
- 1551US7289528B2Component interconnect with self-clocking dataMOTOROLA INC·Filed 2003·Granted Oct 30, 2007·1 cites·10 claims
- 1644US2008250499A1Method and Apparatus for Reducing Buffer Overflow Exploits by Computer VirusesMOTOROLA INC·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →