Inventor · disambiguated record
David Barge
Also filed as: BARGE DAVID
6 granted patents·2 pending applications·1 citations·filing 2012–2024
66Inventor score
Files withIMEC VZW3BARGE DAVID1GOURHANT OLIVIER1ST MICROELECTRONICS CROLLES 21ST MICROELECTRONICS CROLLES 2 SAS1
Top patents by PatentIndex Score
8 records- 0173US2025110080A1Nanopore transistor for biosensingIMEC VZW·Filed 2024·Application pending·0 cites
- 0264US12188895B2Nanopore transistor for biosensingIMEC VZW·Filed 2022·Granted Jan 7, 2025·0 cites·16 claims
- 0359US9412589B2Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuitST MICROELECTRONICS CROLLES 2 SAS·Filed 2014·Granted Aug 9, 2016·1 cites·20 claims
- 0446US9269768B2Insulation wall between transistors on SOIST MICROELECTRONICS CROLLES 2·Filed 2015·Granted Feb 23, 2016·0 cites·23 claims
- 0543US11735645B2Method for forming a bioFET sensor including semiconductor fin or nanowireIMEC VZW·Filed 2020·Granted Aug 22, 2023·0 cites·20 claims
- 0641US8951885B2Insulation wall between transistors on SOIBARGE DAVID·Filed 2012·Granted Feb 10, 2015·0 cites·9 claims
- 0740US2016181382A1Method for fabricating a transistor with a raised source-drain structureST MICROELECTRONICS SA·Filed 2014·Application pending·0 cites
- 0830US8802575B2Method for forming the gate insulator of a MOS transistorGOURHANT OLIVIER·Filed 2012·Granted Aug 12, 2014·0 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →