Inventor · disambiguated record
James S. Coke
Also filed as: COKE JAMES · COKE JAMES S
20 granted patents·1 pending application·693 citations·filing 1993–2013
96Inventor score
Technology areasG06F
Top patents by PatentIndex Score
21 records- 0192US7430578B2Method and apparatus for performing multiply-add operations on packed byte dataINTEL CORP·Filed 2003·Granted Sep 30, 2008·98 cites·32 claims
- 0290US8793470B2Length determination of instruction code with address form field and escape opcode value by evaluating portions other than instruction specific opcodeINTEL CORP·Filed 2013·Granted Jul 29, 2014·9 cites·20 claims
- 0388US5708849AImplementing scatter/gather operations in a direct memory access device on a personal computerINTEL CORP·Filed 1997·Granted Jan 13, 1998·195 cites·19 claims
- 0486US8489660B2Digital random number generator using partially entropic dataHERBERT HOWARD C·Filed 2009·Granted Jul 16, 2013·24 cites·17 claims
- 0580US7467286B2Executing partial-width packed data instructionsINTEL CORP·Filed 2005·Granted Dec 16, 2008·8 cites·29 claims
- 0679US7966476B2Determining length of instruction with escape and addressing form bytes without evaluating opcodeINTEL CORP·Filed 2008·Granted Jun 21, 2011·6 cites·30 claims
- 0778US9239801B2Systems and methods for preventing unauthorized stack pivotingINTEL CORP·Filed 2013·Granted Jan 19, 2016·5 cites·19 claims
- 0878US6192467B1Executing partial-width packed data instructionsINTEL CORP·Filed 1998·Granted Feb 20, 2001·82 cites·43 claims
- 0975US5455915AComputer system with bridge circuitry having input/output multiplexers and third direct unidirectional path for data transfer between buses operating at different ratesINTEL CORP·Filed 1993·Granted Oct 3, 1995·68 cites·7 claims
- 1073US6122725AExecuting partial-width packed data instructionsINTEL CORP·Filed 1998·Granted Sep 19, 2000·65 cites·13 claims
- 1171US8402252B2Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcodeCOKE JAMES S·Filed 2012·Granted Mar 19, 2013·2 cites·19 claims
- 1270US6970994B2Executing partial-width packed data instructionsINTEL CORP·Filed 2001·Granted Nov 29, 2005·12 cites·117 claims
- 1369US6233671B1Staggering execution of an instruction by dividing a full-width macro instruction into at least two partial-width micro instructionsINTEL CORP·Filed 1998·Granted May 15, 2001·63 cites·11 claims
- 1463US7917734B2Determining length of instruction with multiple byte escape code based on information from other than opcode byteINTEL CORP·Filed 2003·Granted Mar 29, 2011·6 cites·46 claims
- 1559USRE45458EDual function system and method for shuffling packed data elementsROUSSEL PATRICE·Filed 2002·Granted Apr 7, 2015·7 cites·56 claims
- 1654US9323533B2Supervisor mode execution protectionVEN ADRIAAN VAN DE·Filed 2011·Granted Apr 26, 2016·1 cites·17 claims
- 1749US8161269B2Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcodeCOKE JAMES S·Filed 2011·Granted Apr 17, 2012·0 cites·28 claims
- 1848US5794070AMethod and apparatus for fast DMA transfer on an industry standard architecture (ISA) busINTEL CORP·Filed 1996·Granted Aug 11, 1998·27 cites·26 claims
- 1945US8938606B2System, apparatus, and method for segment register read and write regardless of privilege levelPATEL BAIJU V·Filed 2010·Granted Jan 20, 2015·0 cites·18 claims
- 2044US6026455AArchitecture and method for providing guaranteed access for a retrying bus master to a data transfer bridge connecting two buses in a computer systemINTEL CORP·Filed 1994·Granted Feb 15, 2000·15 cites·21 claims
- 2142US2014189311A1System and method for performing a shuffle instructionROUSSEL PATRICE·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →