Inventor · disambiguated record
Douglas Craig Bossen
Also filed as: BOSSEN DOUGLAS C · BOSSEN DOUGLAS CRAIG
25 granted patents·1,022 citations·filing 1979–2002
97Inventor score
Files withIBM25
Top patents by PatentIndex Score
25 records- 0193US6636981B1Method and system for end-to-end problem determination and fault isolation for storage area networksIBM·Filed 2000·Granted Oct 21, 2003·121 cites·28 claims
- 0288US4319357ADouble error correction using single error correcting codeIBM·Filed 1979·Granted Mar 9, 1982·57 cites·3 claims
- 0384US5058115AFault tolerant computer memory systems and components employing dual level error correction and detection with lock-up featureIBM·Filed 1989·Granted Oct 15, 1991·79 cites·7 claims
- 0483US6851071B2Apparatus and method of repairing a processor array for a failure detected at runtimeIBM·Filed 2001·Granted Feb 1, 2005·39 cites·36 claims
- 0579US6789048B2Method, apparatus, and computer program product for deconfiguring a processorIBM·Filed 2002·Granted Sep 7, 2004·27 cites·21 claims
- 0679US6516429B1Method and apparatus for run-time deconfiguration of a processor in a symmetrical multi-processing systemIBM·Filed 1999·Granted Feb 4, 2003·85 cites·48 claims
- 0777US5228046AFault tolerant computer memory systems and components employing dual level error correction and detection with disablement featureIBM·Filed 1991·Granted Jul 13, 1993·57 cites·5 claims
- 0875US5682394AFault tolerant computer memory systems and components employing dual level error correction and detection with disablement featureIBM·Filed 1993·Granted Oct 28, 1997·51 cites·2 claims
- 0973US4461001ADeterministic permutation algorithmIBM·Filed 1982·Granted Jul 17, 1984·21 cites·9 claims
- 1071US6058491AMethod and system for fault-handling to improve reliability of a data-processing systemIBM·Filed 1997·Granted May 2, 2000·62 cites·24 claims
- 1167US6199171B1Time-lag duplexing techniquesIBM·Filed 1998·Granted Mar 6, 2001·52 cites·14 claims
- 1266US6332181B1Recovery mechanism for L1 data cache parity errorsIBM·Filed 1998·Granted Dec 18, 2001·52 cites·10 claims
- 1365US5533036AFault tolerant computer memory systems and components employing dual level error correction and detection with disablement featureIBM·Filed 1995·Granted Jul 2, 1996·36 cites·2 claims
- 1464US5380998ASingle width bar code with end code providing bidirectionalityIBM·Filed 1993·Granted Jan 10, 1995·32 cites·6 claims
- 1562US6233680B1Method and system for boot-time deconfiguration of a processor in a symmetrical multi-processing systemIBM·Filed 1998·Granted May 15, 2001·40 cites·2 claims
- 1662US5552591APresence/absence bar codeIBM·Filed 1993·Granted Sep 3, 1996·26 cites·10 claims
- 1756US6179207B1Method for writing single width bar codes on semiconductors wafersIBM·Filed 1996·Granted Jan 30, 2001·18 cites·4 claims
- 1856US6108753ACache error retry techniqueIBM·Filed 1998·Granted Aug 22, 2000·35 cites·8 claims
- 1953US6223299B1Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enablesIBM·Filed 1998·Granted Apr 24, 2001·26 cites·28 claims
- 2051US6675341B1Extended error correction for SEC-DED codes with package error detection abilityIBM·Filed 1999·Granted Jan 6, 2004·24 cites·10 claims
- 2151US5521709AContinuous barcode marking systemIBM·Filed 1993·Granted May 28, 1996·17 cites·12 claims
- 2247US5978936ARun time error probe in a network computing environmentIBM·Filed 1997·Granted Nov 2, 1999·28 cites·21 claims
- 2347US5956351ADual error correction codeIBM·Filed 1997·Granted Sep 21, 1999·12 cites·18 claims
- 2445US6243823B1Method and system for boot-time deconfiguration of a memory in a processing systemIBM·Filed 1998·Granted Jun 5, 2001·16 cites·18 claims
- 2542US5161163AMethod and apparatus for providing error correction to symbol level codesIBM·Filed 1991·Granted Nov 3, 1992·9 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →