Inventor · disambiguated record
Brian G. Anthony
Also filed as: ANTHONY BRIAN G · ANTHONY BRIAN GEORGE
6 granted patents·2 pending applications·324 citations·filing 1999–2017
86Inventor score
Top patents by PatentIndex Score
8 records- 0195US6713381B2Method of forming semiconductor device including interconnect barrier layersMOTOROLA INC·Filed 2002·Granted Mar 30, 2004·135 cites·13 claims
- 0292US6444569B2Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) processMOTOROLA INC·Filed 2001·Granted Sep 3, 2002·60 cites·29 claims
- 0385US6274478B1Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) processMOTOROLA INC·Filed 1999·Granted Aug 14, 2001·70 cites·9 claims
- 0479US6573173B2Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) processMOTOROLA INC·Filed 2002·Granted Jun 3, 2003·23 cites·3 claims
- 0572US6451181B1Method of forming a semiconductor device barrier layerMOTOROLA INC·Filed 1999·Granted Sep 17, 2002·36 cites·6 claims
- 0646US10446436B2In-line protection from process induced dielectric damageNXP USA INC·Filed 2017·Granted Oct 15, 2019·0 cites·25 claims
- 0739US2002092763A1Method for forming a barrier layer for use in a copper interconnectFiled 2002·Application pending·0 cites
- 0827US2002000665A1Semiconductor device conductive bump and interconnect barrierFiled 1999·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →