Inventor · disambiguated record
Jin-Fuw Lee
Also filed as: LEE JIN-FUW
13 granted patents·1 pending application·164 citations·filing 1997–2012
92Inventor score
Top patents by PatentIndex Score
14 records- 0188US7536664B2Physical design system and methodIBM·Filed 2004·Granted May 19, 2009·44 cites·18 claims
- 0286US8473885B2Physical design system and methodCOHN JOHN M·Filed 2012·Granted Jun 25, 2013·8 cites·20 claims
- 0383US7269817B2Lithographic process window optimization under complex constraints on edge placementIBM·Filed 2004·Granted Sep 11, 2007·23 cites·6 claims
- 0480US7448018B2System and method for employing patterning process statistics for ground rules waivers and optimizationIBM·Filed 2006·Granted Nov 4, 2008·9 cites·20 claims
- 0577US8219943B2Physical design system and methodCOHN JOHN M·Filed 2009·Granted Jul 10, 2012·6 cites·24 claims
- 0671US8020120B2Layout quality gauge for integrated circuit designIBM·Filed 2007·Granted Sep 13, 2011·7 cites·18 claims
- 0771US7831941B2CA resistance variability prediction methodologyIBM·Filed 2008·Granted Nov 9, 2010·5 cites·18 claims
- 0868US8122387B2Optimizing integrated circuit chip designs for optical proximity correctionHAN GENG·Filed 2009·Granted Feb 21, 2012·3 cites·21 claims
- 0964US6144224AClock distribution network with dual wire routingIBM·Filed 1999·Granted Nov 7, 2000·20 cites·24 claims
- 1059US7962865B2System and method for employing patterning process statistics for ground rules waivers and optimizationIBM·Filed 2008·Granted Jun 14, 2011·1 cites·20 claims
- 1150US6430731B1Methods and apparatus for performing slew dependent signal bounding for signal timing analysisIBM·Filed 1999·Granted Aug 6, 2002·24 cites·43 claims
- 1247US2011173577A1Techniques for Pattern Process Tuning and Design Optimization for Maximizing Process-Sensitive Circuit YieldsIBM·Filed 2008·Application pending·0 cites
- 1346US7302671B2Integrated circuit logic with self compensating shapesIBM·Filed 2005·Granted Nov 27, 2007·0 cites·13 claims
- 1441US5994924AClock distribution network with dual wire routingIBM·Filed 1997·Granted Nov 30, 1999·14 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →