Inventor · disambiguated record
Yukio Morozumi
Also filed as: MOROZUMI YUKIO
20 granted patents·3 pending applications·388 citations·filing 1973–2018
96Inventor score
Top patents by PatentIndex Score
23 records- 0191US6710460B2Semiconductor devices and methods for manufacturing the sameSEIKO EPSON CORP·Filed 2002·Granted Mar 23, 2004·59 cites·6 claims
- 0286US6664644B2Semiconductor device and method for manufacturing the sameSEIKO EPSON CORP·Filed 2002·Granted Dec 16, 2003·44 cites·12 claims
- 0377US5266525AMicroelectronic interlayer dielectric structure and methods of manufacturing sameSEIKO EPSON CORP·Filed 1991·Granted Nov 30, 1993·48 cites·16 claims
- 0474US6723628B2Method for forming bonding pad structures in semiconductor devicesSEIKO EPSON CORP·Filed 2001·Granted Apr 20, 2004·18 cites·9 claims
- 0572US6194304B1Semiconductor device and method of fabricating the sameSEIKO EPSON CORP·Filed 1999·Granted Feb 27, 2001·36 cites·15 claims
- 0667US6399477B2Semiconductor devices and methods for manufacturing semiconductor devicesSEIKO EPSON CORP·Filed 2001·Granted Jun 4, 2002·12 cites·15 claims
- 0766US5051807AIntegrated semiconductor structure with incorporated alignment markingsSEIKO EPSON CORP·Filed 1991·Granted Sep 24, 1991·38 cites·7 claims
- 0864US6498090B2Semiconductor devices and methods for manufacturing the sameSEIKO EPSON CORP·Filed 2001·Granted Dec 24, 2002·10 cites·20 claims
- 0959US6559545B2Semiconductor devices and methods for manufacturing semiconductor devicesSEIKO EPSON CORP·Filed 2002·Granted May 6, 2003·7 cites·8 claims
- 1059US6246105B1Semiconductor device and manufacturing process thereofSEIKO EPSON CORP·Filed 1998·Granted Jun 12, 2001·29 cites·4 claims
- 1156US5514624AMethod of manufacturing a microelectronic interlayer dielectric structureSEIKO EPSON CORP·Filed 1993·Granted May 7, 1996·25 cites·8 claims
- 1255US7091609B2Semiconductor devices including an alloy layer and a wetting layer on an interlayer dielectricSEIKO EPSON CORP·Filed 2004·Granted Aug 15, 2006·5 cites·17 claims
- 1352US6358830B1Method for manufacturing semiconductor device having interlayer dielectric film layers with like etch speedsSEIKO EPSON CORP·Filed 1999·Granted Mar 19, 2002·17 cites·14 claims
- 1452US6137176ASemiconductor device and method of fabricating the sameSEIKO EPSON CORP·Filed 1998·Granted Oct 24, 2000·15 cites·4 claims
- 1549US4068285AVariable capacitorSUWA SEIKOSHA KK·Filed 1976·Granted Jan 10, 1978·9 cites·10 claims
- 1648US6812123B2Semiconductor devices and methods for manufacturing the sameSEIKO EPSON CORP·Filed 2001·Granted Nov 2, 2004·3 cites·13 claims
- 1742US6569785B2Semiconductor integrated circuit device having internal tensile and internal compression stressSEIKO EPSON CORP·Filed 2002·Granted May 27, 2003·0 cites·17 claims
- 1842US5376435AMicroelectronic interlayer dielectric structureSEIKO EPSON CORP·Filed 1993·Granted Dec 27, 1994·10 cites·9 claims
- 1938US2004207088A1Semiconductor device and method for manufacturing the sameSEIKO EPSON CORP·Filed 2004·Application pending·0 cites
- 2037US2003025184A1Semiconductor device and method for manufacturing the sameSEIKO EPSON CORP·Filed 2002·Application pending·0 cites
- 2137US2003098466A1Capacitor element, method for manufacturing the same, semiconductor device and method for manufacturing the sameSEIKO EPSON CORP·Filed 2002·Application pending·0 cites
- 2235US10804521B2Battery terminalYAZAKI CORP·Filed 2018·Granted Oct 13, 2020·0 cites·17 claims
- 2323US3988181AMethod of doping a polycrystalline silicon layerIMAI FUKASHI·Filed 1973·Granted Oct 26, 1976·3 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →