Inventor · disambiguated record
Kevin Leclair
Also filed as: LECLAIR KEVIN · LECLAIR KEVIN R
6 granted patents·2 pending applications·161 citations·filing 1995–2013
84Inventor score
Top patents by PatentIndex Score
8 records- 0182US5596539AMethod and apparatus for a low power self-timed memory control systemLSI LOGIC CORP·Filed 1995·Granted Jan 21, 1997·109 cites·31 claims
- 0275US8406031B2Read-only memory (ROM) bitcell, array, and architectureBUER MYRON·Filed 2010·Granted Mar 26, 2013·5 cites·20 claims
- 0364US5808900AMemory having direct strap connection to power supplyLSI LOGIC CORP·Filed 1996·Granted Sep 15, 1998·25 cites·27 claims
- 0463US8226097B2Integrated steering gear, frame member and engine mount baseKUDLA CHRISTOPHER·Filed 2009·Granted Jul 24, 2012·8 cites·18 claims
- 0562US6870782B2Row redundancy memory repair scheme with shift to eliminate timing penaltyLSI LOGIC CORP·Filed 2003·Granted Mar 22, 2005·13 cites·13 claims
- 0655US8830721B2Encoded read-only memory (ROM) bitcell, array, and architectureBROADCOM CORP·Filed 2013·Granted Sep 9, 2014·1 cites·20 claims
- 0731US2006218455A1Integrated circuit margin stress test systemSILICON DESIGN SOLUTION INC·Filed 2005·Application pending·0 cites
- 0828US2004076042A1High performance memory column group repair scheme with small area penaltyFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →