Inventor · disambiguated record
Jose Maiz
Also filed as: MAIZ JOSE · MAIZ JOSE A
22 granted patents·8 pending applications·408 citations·filing 1993–2013
96Inventor score
Top patents by PatentIndex Score
30 records- 0194US7381608B2Method for making a semiconductor device with a high-k gate dielectric and a metal gate electrodeINTEL CORP·Filed 2004·Granted Jun 3, 2008·85 cites·20 claims
- 0292US6943648B2Methods for forming a frequency bulk acoustic resonator with uniform frequency utilizing multiple trimming layers and structures formed therebyINTEL CORP·Filed 2003·Granted Sep 13, 2005·51 cites·22 claims
- 0388US7531404B2Semiconductor device having a metal gate electrode formed on an annealed high-k gate dielectric layerINTEL CORP·Filed 2005·Granted May 12, 2009·16 cites·23 claims
- 0486US7647536B2Repair bits for a low voltage cacheINTEL CORP·Filed 2005·Granted Jan 12, 2010·16 cites·29 claims
- 0586US5430595AElectrostatic discharge protection circuitINTEL CORP·Filed 1993·Granted Jul 4, 1995·89 cites·14 claims
- 0683US7662674B2Methods of forming electromigration and thermal gradient based fuse structuresINTEL CORP·Filed 2005·Granted Feb 16, 2010·10 cites·9 claims
- 0783US6919637B2Interconnect structure for an integrated circuit and method of fabricationINTEL CORP·Filed 2002·Granted Jul 19, 2005·30 cites·9 claims
- 0882US6596562B1Semiconductor wafer singulation methodINTEL CORP·Filed 2002·Granted Jul 22, 2003·27 cites·29 claims
- 0981US6787970B2Tuning of packaged film bulk acoustic resonator filtersINTEL CORP·Filed 2003·Granted Sep 7, 2004·20 cites·27 claims
- 1079US7151051B2Interconnect structure for an integrated circuit and method of fabricationINTEL CORP·Filed 2005·Granted Dec 19, 2006·7 cites·11 claims
- 1174US7727892B2Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnectsINTEL CORP·Filed 2002·Granted Jun 1, 2010·16 cites·20 claims
- 1271US7889013B2Microelectronic die having CMOS ring oscillator thereon and method of using sameINTEL CORP·Filed 2007·Granted Feb 15, 2011·4 cites·11 claims
- 1370US6794755B2Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvementINTEL CORP·Filed 2003·Granted Sep 21, 2004·11 cites·6 claims
- 1468US8551555B2Biocompatible coatings for medical devicesBURGHARD JOHN·Filed 2007·Granted Oct 8, 2013·4 cites·29 claims
- 1564US7339271B2Metal-metal oxide etch stop/barrier for integrated circuit interconnectsINTEL CORP·Filed 2004·Granted Mar 4, 2008·9 cites·19 claims
- 1661US7755140B2Process charging and electrostatic damage protection in silicon-on-insulator technologyINTEL CORP·Filed 2006·Granted Jul 13, 2010·2 cites·8 claims
- 1760US9690578B2High dose radiation detectorINTEL CORP·Filed 2013·Granted Jun 27, 2017·1 cites·8 claims
- 1857US8299617B2Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnectsMORROW XIAORONG·Filed 2010·Granted Oct 30, 2012·1 cites·5 claims
- 1951US7679145B2Transistor performance enhancement using engineered strainsINTEL CORP·Filed 2004·Granted Mar 16, 2010·5 cites·21 claims
- 2050US8368171B2Methods of forming electromigration and thermal gradient based fuse structuresINTEL CORP·Filed 2006·Granted Feb 5, 2013·0 cites·7 claims
- 2150US6952269B2Apparatus and method for adiabatically heating a semiconductor surfaceINTEL CORP·Filed 2002·Granted Oct 4, 2005·3 cites·31 claims
- 2246US2006202267A1Methods of optimization of implant conditions to minimize channeling and structures formed therebyRANADE PUSHKAR·Filed 2006·Application pending·0 cites
- 2345US2009130293A1Biocompatible coatings for medical devicesSHYKIND DAVID·Filed 2007·Application pending·0 cites
- 2442US8132061B2Repair bits for a low voltage cacheDEMPSEY MORGAN J·Filed 2009·Granted Mar 6, 2012·1 cites·14 claims
- 2542US2008070367A1Methods to create dual-gate dielectrics in transistors using high-K dielectricPAE SANGWOO·Filed 2006·Application pending·0 cites
- 2641US2008242012A1High quality silicon oxynitride transition layer for high-k/metal gate transistorsPAE SANGWOO·Filed 2007·Application pending·0 cites
- 2740US2004056366A1A method of forming surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvementFiled 2002·Application pending·0 cites
- 2840US2006084248A1Methods of optimization of implant conditions to minimize channeling and structures formed therebyRANADE PUSHKAR·Filed 2004·Application pending·0 cites
- 2935US2008203388A1Apparatus and method for detection of edge damagesHE JUN·Filed 2007·Application pending·0 cites
- 3032US2008076216A1Method to fabricate high-k/metal gate transistors using a double capping layer processPAE SANGWOO·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →