Inventor · disambiguated record
Edgardo Laber
Also filed as: LABER EDGARDO · LABER EDGARDO A
13 granted patents·3 pending applications·99 citations·filing 1999–2023
91Inventor score
Files withINTERSIL INC6HAGGAG HOSAM3Intersil Americas LLC2LABER EDGARDO2RENESAS ELECTRONICS AMERICA INC2
Top patents by PatentIndex Score
16 records- 0191US7903465B2Memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2007·Granted Mar 8, 2011·20 cites·10 claims
- 0291US7688627B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2007·Granted Mar 30, 2010·20 cites·15 claims
- 0386US8797043B2System and method for detection of open connections between an integrated circuit and a multi-cell battery packLABER EDGARDO·Filed 2011·Granted Aug 5, 2014·11 cites·19 claims
- 0481US7502264B2On-chip EE-PROM programming waveform generationINTERSIL INC·Filed 2006·Granted Mar 10, 2009·12 cites·21 claims
- 0580US7158412B2On-chip EE-PROM programming waveform generationINTERSIL INC·Filed 2005·Granted Jan 2, 2007·12 cites·21 claims
- 0670US8345488B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2011·Granted Jan 1, 2013·3 cites·6 claims
- 0763US8315100B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Nov 20, 2012·2 cites·7 claims
- 0863US7944745B2Flash memory array of floating gate-based non-volatile memory cellsINTERSIL INC·Filed 2010·Granted May 17, 2011·2 cites·5 claims
- 0962US10782355B2Systems and methods for an open wire scanIntersil Americas LLC·Filed 2018·Granted Sep 22, 2020·0 cites·18 claims
- 1057US10101403B2Systems and methods for an open wire scanIntersil Americas LLC·Filed 2014·Granted Oct 16, 2018·0 cites·8 claims
- 1157US2024274595A1Integrated circuit with protective elementRENESAS ELECTRONICS AMERICA INC·Filed 2023·Application pending·0 cites
- 1257US2024274568A1Package for use with integarted circuitRENESAS ELECTRONICS AMERICA INC·Filed 2023·Application pending·0 cites
- 1343US6363432B1Media independent interface between IEEE 802.3 (ethernet) based physical layer devicesMICRO LINEAR CORP·Filed 1999·Granted Mar 26, 2002·17 cites·33 claims
- 1442US8325522B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Dec 4, 2012·0 cites·11 claims
- 1542US8218370B2Memory array of floating gate-based non-volatile memory cellsHAGGAG HOSAM·Filed 2011·Granted Jul 10, 2012·0 cites·20 claims
- 1636US2012086401A1Cell balancing circuit for use in a multi-cell battery systemLABER EDGARDO·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →