Inventor · disambiguated record
Glen Sescila
Also filed as: SESCILA GLEN · SESCILA GLEN O · SESCILA III GLEN O · SESCILA III GLEN OWEN
18 granted patents·3 pending applications·499 citations·filing 1997–2023
94Inventor score
Files withDELL PRODUCTS LP8NAT INSTR CORP8NAT INSTRUMENTS CORP2FEIEREISEL NEIL S1SCORSI RAFAEL CASTRO1
Top patents by PatentIndex Score
21 records- 0195US11281602B1System and method to pipeline, compound, and chain multiple data transfer and offload operations in a smart data accelerator interface deviceDELL PRODUCTS LP·Filed 2020·Granted Mar 22, 2022·8 cites·18 claims
- 0294US7631097B2Method and apparatus for optimizing the responsiveness and throughput of a system performing packetized data transfers using a transfer count markNAT INSTR CORP·Filed 2005·Granted Dec 8, 2009·60 cites·32 claims
- 0389US5953511APCI bus to IEEE 1394 bus translatorNAT INSTR CORP·Filed 1997·Granted Sep 14, 1999·161 cites·56 claims
- 0487US12306778B2Method and system for extending SDXI to include IP addressesDELL PRODUCTS LP·Filed 2023·Granted May 20, 2025·1 cites·20 claims
- 0586US6418504B2System and method for coupling peripheral buses through a serial bus using a split bridge implementationNAT INSTR CORP·Filed 2001·Granted Jul 9, 2002·43 cites·57 claims
- 0685US11507274B2System and method to use dictionaries in LZ4 block format compressionDELL PRODUCTS LP·Filed 2020·Granted Nov 22, 2022·2 cites·20 claims
- 0779US6425033B1System and method for connecting peripheral buses through a serial busNAT INSTR CORP·Filed 1998·Granted Jul 23, 2002·78 cites·79 claims
- 0877US8307136B2Data movement system and methodFEIEREISEL NEIL S·Filed 2009·Granted Nov 6, 2012·12 cites·21 claims
- 0976US6640312B1System and method for handling device retry requests on a communication mediumNAT INSTR CORP·Filed 2000·Granted Oct 28, 2003·27 cites·24 claims
- 1072US5875313APCI bus to IEEE 1394 bus translator employing write pipe-lining and sequential write combiningNAT INSTR CORP·Filed 1997·Granted Feb 23, 1999·79 cites·35 claims
- 1169US8458371B2Peripheral devices integrated into a processing chainSCORSI RAFAEL CASTRO·Filed 2009·Granted Jun 4, 2013·6 cites·22 claims
- 1263US12066971B2Direct network access by a memory mapped peripheral device for scheduled data transfer on the networkNAT INSTRUMENTS CORP·Filed 2022·Granted Aug 20, 2024·0 cites·20 claims
- 1357US7849210B2Optimizing the responsiveness and throughput of a system performing packetized data transfersNAT INSTR CORP·Filed 2008·Granted Dec 7, 2010·1 cites·32 claims
- 1456US12307181B2Systems and methods for transparent FPGA reconfigurationDELL PRODUCTS LP·Filed 2022·Granted May 20, 2025·0 cites·16 claims
- 1554US11507292B2System and method to utilize a composite block of data during compression of data blocks of fixed sizeDELL PRODUCTS LP·Filed 2020·Granted Nov 22, 2022·0 cites·20 claims
- 1651US11422963B2System and method to handle uncompressible data with a compression acceleratorDELL PRODUCTS LP·Filed 2020·Granted Aug 23, 2022·0 cites·17 claims
- 1751US2018276175A1Direct Network Access by a Memory Mapped Peripheral Device for Scheduled Data Transfer on the NetworkNAT INSTRUMENTS CORP·Filed 2017·Application pending·0 cites
- 1849US2024020158A1Lcs resource device presentation systemDELL PRODUCTS LP·Filed 2022·Application pending·0 cites
- 1948US5937175APCI bus to IEEE 1394 bus translator employing pipe-lined read prefetchingNAT INSTR CORP·Filed 1997·Granted Aug 10, 1999·21 cites·52 claims
- 2047US11829798B2System and method to improve data compression ratios for fixed block sizes in a smart data accelerator interface deviceDELL PRODUCTS LP·Filed 2020·Granted Nov 28, 2023·0 cites·19 claims
- 2143US2005046458A1Digital delay elements constructed in a programmable logic deviceFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →