Inventor · disambiguated record
Jieh-Jang Chen
Also filed as: CHEN JIEH-JANG
21 granted patents·3 pending applications·190 citations·filing 2002–2025
94Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD16TAIWAN SEMICONDUCTOR MFG4LAN SHUN-WEI2CHOU HSING-FEI1TIAWAN SEMICONDUCTOR MFG CO LT1
Top patents by PatentIndex Score
24 records- 0194US6645851B1Method of forming planarized coatings on contact hole patterns of various duty ratiosTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Nov 11, 2003·98 cites·38 claims
- 0291US10439135B2VIA structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Oct 8, 2019·5 cites·20 claims
- 0389US9847477B2Method of forming a bottom electrode of a magnetoresistive random access memory cellTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 19, 2017·4 cites·20 claims
- 0488US11049767B2Semiconductor device and methods of manufacturing thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 29, 2021·4 cites·20 claims
- 0588US2025311635A1Method of forming a bottom electrode of a magnetoresistive random access memory cellTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0686US10510587B2Method for manufacturing semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 17, 2019·3 cites·20 claims
- 0782US12439837B2Via structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Oct 7, 2025·0 cites·20 claims
- 0881US12342728B2Method of forming a bottom electrode of a magnetoresistive random access memory cellTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 24, 2025·0 cites·20 claims
- 0981US7189957B2Methods to improve photonic performances of photo-sensitive integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Mar 13, 2007·6 cites·18 claims
- 1080US8409456B2Planarization method for high wafer topographyLAN SHUN-WEI·Filed 2011·Granted Apr 2, 2013·8 cites·24 claims
- 1180US6803291B1Method to preserve alignment mark optical integrityTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 12, 2004·32 cites·20 claims
- 1278US2024404877A1Methods of manufacturing semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1376US12010933B2Via structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 11, 2024·0 cites·20 claims
- 1476US7443005B2Lens structures suitable for use in image sensors and method for making the sameTIAWAN SEMICONDUCTOR MFG CO LT·Filed 2004·Granted Oct 28, 2008·24 cites·22 claims
- 1574US11489115B2VIA structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Nov 1, 2022·0 cites·20 claims
- 1674USRE41697EMethod of forming planarized coatings on contact hole patterns of various duty ratiosTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 14, 2010·4 cites·56 claims
- 1769US12456649B2Semiconductor device and methods of manufacturing thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 28, 2025·0 cites·20 claims
- 1869US11289646B2Method of forming a bottom electrode of a magnetoresistive random access memory cellTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Mar 29, 2022·0 cites·20 claims
- 1966US8466070B2Methods of forming semiconductor structuresCHOU HSING-FEI·Filed 2011·Granted Jun 18, 2013·2 cites·20 claims
- 2065US10998498B2VIA structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 4, 2021·0 cites·20 claims
- 2164US10910260B2Method for manufacturing semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Feb 2, 2021·0 cites·20 claims
- 2260US10535815B2Method of forming a bottom electrode of a magnetoresistive random access memory cellTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jan 14, 2020·0 cites·20 claims
- 2352US10943783B2Method for manufacturing a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Mar 9, 2021·0 cites·20 claims
- 2431US2012266810A1Planarization system for high wafer topographyLAN SHUN-WEI·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →