Inventor · disambiguated record
Ching-Fa Yeh
Also filed as: YEH CHING F · YEH CHING-FA
17 granted patents·1 pending application·214 citations·filing 1987–2004
94Inventor score
Top patents by PatentIndex Score
18 records- 0185US6294832B1Semiconductor device having structure of copper interconnect/barrier dielectric liner/low-k dielectric trench and its fabrication methodNAT SCIENCE COUNCIL·Filed 2000·Granted Sep 25, 2001·42 cites·23 claims
- 0276US6486057B1Process for preparing Cu damascene interconnectionNAT SCIENCE COUNCIL·Filed 2002·Granted Nov 26, 2002·24 cites·7 claims
- 0365US6774461B2Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structureNAT SCIENCE COUNCIL·Filed 2002·Granted Aug 10, 2004·10 cites·7 claims
- 0459US7115449B2Method for fabrication of polycrystalline silicon thin film transistorsUNIV NAT CHIAO TUNG·Filed 2004·Granted Oct 3, 2006·8 cites·8 claims
- 0559US5648128AMethod for enhancing the growth rate of a silicon dioxide layer grown by liquid phase depositionNAT SCIENCE COUNCIL·Filed 1996·Granted Jul 15, 1997·23 cites·4 claims
- 0657US6251753B1Method of sidewall capping for degradation-free damascene trenches of low dielectric constant dielectric by selective liquid-phase depositionFiled 1999·Granted Jun 26, 2001·25 cites·13 claims
- 0756US5614270AMethod of improving electrical characteristics of a liquid phase deposited silicon dioxide film by plasma treatmentNAT SCIENCE COUNCIL·Filed 1996·Granted Mar 25, 1997·20 cites·4 claims
- 0853US4818719AMethod of manufacturing an integrated CMOS of ordinary logic circuit and of high voltage MOS circuitFUJI XEROX CO LTD·Filed 1987·Granted Apr 4, 1989·15 cites·7 claims
- 0950US7109075B2Method for fabrication of polycrystallin silicon thin film transistorsUNIV NAT CHIAO TUNG·Filed 2003·Granted Sep 19, 2006·4 cites·7 claims
- 1050US6653245B2Method for liquid phase depositionIND TECH RES INST·Filed 2001·Granted Nov 25, 2003·4 cites·3 claims
- 1145US4961101ASemiconductor MOSFET device with offset regionsFUJI XEROX CO LTD·Filed 1988·Granted Oct 2, 1990·8 cites·5 claims
- 1242US5661051AMethod for fabricating a polysilicon transistor having a buried-gate structureNAT SCIENCE COUNCIL·Filed 1996·Granted Aug 26, 1997·12 cites·5 claims
- 1340US6903029B2Method of reducing thick film stress of spin-on dielectric and the resulting sandwich dielectric structureNAT SCIENCE COUNCIL·Filed 2004·Granted Jun 7, 2005·0 cites·24 claims
- 1436US6087276AMethod of making a TFT having an ion plated silicon dioxide capping layerNAT SCIENCE COUNCIL·Filed 1996·Granted Jul 11, 2000·6 cites·4 claims
- 1536US2003219978A1Method and apparatus for liquid phase depositionIND TECH RES INST·Filed 2002·Application pending·0 cites
- 1631US5776835AMethod of making a grooved gate structure of semiconductor deviceNAT SCIENCE COUNCIL·Filed 1996·Granted Jul 7, 1998·7 cites·5 claims
- 1730US5057445AMethod of making a high-voltage, low on-resistance igfetKYOCERA CORP·Filed 1991·Granted Oct 15, 1991·0 cites·2 claims
- 1827US6039857AMethod for forming a polyoxide film on doped polysilicon by anodizationFiled 1998·Granted Mar 21, 2000·6 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →