Inventor · disambiguated record
Qicheng Yu
Also filed as: YU QICHENG
8 granted patents·76 citations·filing 1997–2015
85Inventor score
Top patents by PatentIndex Score
8 records- 0188US8207766B2Method and apparatus for quantization noise reduction in fractional-N PLLsYU QICHENG·Filed 2010·Granted Jun 26, 2012·14 cites·24 claims
- 0272US6445330B1Capacitively coupled references for isolated analog-to-digital converter systemsCIRRUS LOGIC INC·Filed 2001·Granted Sep 3, 2002·19 cites·14 claims
- 0368US8532243B2Digital hold in a phase-locked loopSEETHAMRAJU SRISAI R·Filed 2007·Granted Sep 10, 2013·7 cites·23 claims
- 0466US6002355ASynchronously pumped substrate analog-to-digital converter (ADC) system and methodsCIRRUS LOGIC INC·Filed 1997·Granted Dec 14, 1999·27 cites·27 claims
- 0559US8179163B2Method and apparatus for charge pump linearization in fractional-N PLLsYU QICHENG·Filed 2010·Granted May 15, 2012·2 cites·16 claims
- 0653US9699534B1Time-domain multiplexed signal processing block and method for use with multiple MEMS devicesROUT SAROJ·Filed 2014·Granted Jul 4, 2017·1 cites·20 claims
- 0749US6377198B1Definition of physical level of a logic output by a logic inputCIRRUS LOGIC INC·Filed 2000·Granted Apr 23, 2002·6 cites·28 claims
- 0846US9939290B1Method for calibration of a system with time-multiplexed sensorsPANASONIC CORP·Filed 2015·Granted Apr 10, 2018·0 cites·5 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →