Inventor · disambiguated record
Hiroshi Wabuka
Also filed as: WABUKA HIROSHI
7 granted patents·1 pending application·108 citations·filing 1991–2006
85Inventor score
Files withNEC CORP8
Top patents by PatentIndex Score
8 records- 0186US6365828B1Electromagnetic interference suppressing device and circuitNEC CORP·Filed 2000·Granted Apr 2, 2002·46 cites·13 claims
- 0281US6477694B1Method for designing a power supply decoupling circuitNEC CORP·Filed 2000·Granted Nov 5, 2002·30 cites·8 claims
- 0371US7962320B2Method, apparatus and program for creating a power pin model of a semiconductor integrated circuitNEC CORP·Filed 2006·Granted Jun 14, 2011·6 cites·22 claims
- 0462US6550037B2Method for designing a decoupling circuitNEC CORP·Filed 2000·Granted Apr 15, 2003·9 cites·9 claims
- 0561US7882468B2Integrated circuit device evaluation device, evaluation method, and evaluation programNEC CORP·Filed 2006·Granted Feb 1, 2011·2 cites·36 claims
- 0660US6615394B2Method and apparatus for preparing a simulation model for semiconductor integrated circuit at power terminal for simulating electromagnetic interferenceNEC CORP·Filed 2001·Granted Sep 2, 2003·8 cites·27 claims
- 0741US5216300AOutput buffer for semiconductor integrated circuitNEC CORP·Filed 1991·Granted Jun 1, 1993·7 cites·7 claims
- 0840US2002011885A1Power model for EMI simulation to semiconductor integrated circuit , method of designing the power model, EMI simulator, power model preparation computer program, and storage medium storing the same as well as power model design support systemNEC CORP·Filed 2000·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Hiroshi Wabuka files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →