Inventor · disambiguated record
Bei Zhu
Also filed as: ZHU BEI
7 granted patents·2 pending applications·110 citations·filing 2006–2019
84Inventor score
Files withSEMICONDUCTOR MFG INT SHANGHAI3GAO DA WEI1INVENSENSE INC1NING XIAN JIE1SEMICONDUCTOR MFG INT L SHANGH1
Top patents by PatentIndex Score
9 records- 0194US8350253B1Integrated circuit with stress insertsXILINX INC·Filed 2010·Granted Jan 8, 2013·39 cites·13 claims
- 0293US8299564B1Diffusion regions having different depthsWU YUN·Filed 2009·Granted Oct 30, 2012·51 cites·12 claims
- 0375US7557000B2Etching method and structure using a hard mask for strained silicon MOS transistorsSEMICONDUCTOR MFG INT SHANGHAI·Filed 2006·Granted Jul 7, 2009·8 cites·20 claims
- 0467US7335566B2Polysilicon gate doping method and structure for strained silicon MOS transistorsSEMICONDUCTOR MFG INT SHANGHAI·Filed 2006·Granted Feb 26, 2008·4 cites·20 claims
- 0564US8551831B2Silicon germanium and polysilicon gate structure for strained silicon transistorsGAO DA WEI·Filed 2008·Granted Oct 8, 2013·5 cites·18 claims
- 0662US8058120B2Integration scheme for strained source/drain CMOS using oxide hard maskNING XIAN JIE·Filed 2010·Granted Nov 15, 2011·3 cites·15 claims
- 0749US10941033B23D stack configuration for 6-axis motion sensorINVENSENSE INC·Filed 2019·Granted Mar 9, 2021·0 cites·25 claims
- 0838US2007196992A1In-situ doped silicon germanium and silicon carbide source drain region for strained silicon CMOS transistorsSEMICONDUCTOR MFG INT L SHANGH·Filed 2006·Application pending·0 cites
- 0937US2008173941A1Etching method and structure in a silicon recess for subsequent epitaxial growth for strained silicon mos transistorsSEMICONDUCTOR MFG INT SHANGHAI·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →