Inventor · disambiguated record
Jiewen Fan
Also filed as: FAN JIEWEN
17 granted patents·5 pending applications·55 citations·filing 2011–2016
90Inventor score
Top patents by PatentIndex Score
22 records- 0190US9018968B2Method for testing density and location of gate dielectric layer trap of semiconductor deviceHUANG RU·Filed 2012·Granted Apr 28, 2015·17 cites·6 claims
- 0284US8564031B2High voltage-resistant lateral double-diffused transistor based on nanowire deviceHUANG RU·Filed 2011·Granted Oct 22, 2013·9 cites·7 claims
- 0384US8513067B2Fabrication method for surrounding gate silicon nanowire transistor with air as spacersHUANG RU·Filed 2011·Granted Aug 20, 2013·10 cites·9 claims
- 0482US9502310B1Integration method for a vertical nanowire transistorUNIV BEIJING·Filed 2016·Granted Nov 22, 2016·4 cites·7 claims
- 0576US8372752B1Method for fabricating ultra-fine nanowireUNIV BEIJING·Filed 2012·Granted Feb 12, 2013·5 cites·6 claims
- 0668US8563370B2Method for fabricating surrounding-gate silicon nanowire transistor with air sidewallsHUANG RU·Filed 2011·Granted Oct 22, 2013·3 cites·9 claims
- 0767US9478641B2Method for fabricating FinFET with separated double gates on bulk siliconUNIV BEIJING·Filed 2012·Granted Oct 25, 2016·2 cites·4 claims
- 0862US8901644B2Field effect transistor with a vertical channel and fabrication method thereofHUANG RU·Filed 2011·Granted Dec 2, 2014·2 cites·7 claims
- 0959US8866507B2Method for testing trap density of gate dielectric layer in semiconductor device having no substrate contactHUANG RU·Filed 2011·Granted Oct 21, 2014·1 cites·7 claims
- 1056US9034702B2Method for fabricating silicon nanowire field effect transistor based on wet etchingHUANG RU·Filed 2011·Granted May 19, 2015·1 cites·8 claims
- 1156US8592276B2Fabrication method of vertical silicon nanowire field effect transistorHUANG RU·Filed 2011·Granted Nov 26, 2013·1 cites·9 claims
- 1246US9396949B2Method of adjusting a threshold voltage of a multi-gate structure deviceUNIV BEIJING·Filed 2013·Granted Jul 19, 2016·0 cites·5 claims
- 1342US9356124B2Method for fabricating multi-gate structure device with source and drain having quasi-SOI structureUNIV BEIJING·Filed 2013·Granted May 31, 2016·0 cites·20 claims
- 1441US9425060B2Method for fabricating multiple layers of ultra narrow silicon wiresUNIV BEIJING·Filed 2014·Granted Aug 23, 2016·0 cites·10 claims
- 1541US9349588B2Method for fabricating quasi-SOI source/drain field effect transistor deviceUNIV BEIJING·Filed 2014·Granted May 24, 2016·0 cites·10 claims
- 1641US2015140758A1Method for fabricating finfet on germanium or group iii-v semiconductor substrateUNIV BEIJING·Filed 2013·Application pending·0 cites
- 1740US8722312B2Method for fabricating semiconductor nano circular ringHUANG RU·Filed 2011·Granted May 13, 2014·0 cites·7 claims
- 1839US2016247726A1Method for fabricating a quasi-soi source-drain multi-gate devicePERKING UNIV·Filed 2014·Application pending·0 cites
- 1938US9099500B2Programmable array of silicon nanowire field effect transistor and method for fabricating the sameHUANG RU·Filed 2011·Granted Aug 4, 2015·0 cites·20 claims
- 2036US2013130503A1Method for fabricating ultra-fine nanowireHUANG RU·Filed 2012·Application pending·0 cites
- 2131US2016225851A1Semiconductor structure and method for forming the sameUNIV BEIJING·Filed 2015·Application pending·0 cites
- 2229US2016268384A1Method for preparing a nano-scale field-effect transistorUNIV BEIJING·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →