Inventor · disambiguated record
Ross V. La Fetra
Also filed as: LA FETRA ROSS V · LA FETRA ROSS VOIGT
14 granted patents·248 citations·filing 1990–2022
91Inventor score
Files withADVANCED MICRO DEVICES INC7HEWLETT PACKARD CO3HEWLETT PACKARD DEVELOPMENT CO2ATI TECHNOLOGIES ULC1LA FETRA ROSS V1
Top patents by PatentIndex Score
14 records- 0194US7016213B2Method for initializing a system including a host and plurality of memory modules connected via a serial memory interconnectADVANCED MICRO DEVICES INC·Filed 2004·Granted Mar 21, 2006·91 cites·22 claims
- 0290US7421525B2System including a host connected to a plurality of memory modules via a serial memory interconnectADVANCED MICRO DEVICES INC·Filed 2004·Granted Sep 2, 2008·56 cites·16 claims
- 0372US7271613B1Method and apparatus for sharing an input/output terminal by multiple compensation circuitsADVANCED MICRO DEVICES INC·Filed 2005·Granted Sep 18, 2007·6 cites·25 claims
- 0469US9354970B2Method and apparatus for encoding erroneous data in an error correction code protected memoryADVANCED MICRO DEVICES INC·Filed 2014·Granted May 31, 2016·2 cites·18 claims
- 0564US7076686B2Hot swapping memory method and systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jul 11, 2006·14 cites·20 claims
- 0664US5509119AFast comparison method and apparatus for error corrected cache tagsHEWLETT PACKARD CO·Filed 1994·Granted Apr 16, 1996·44 cites·8 claims
- 0758US12271597B2Memory organization for multi-mode supportATI TECHNOLOGIES ULC·Filed 2022·Granted Apr 8, 2025·0 cites·15 claims
- 0858US11409608B2Providing host-based error detection capabilities in a remote execution deviceADVANCED MICRO DEVICES INC·Filed 2020·Granted Aug 9, 2022·0 cites·20 claims
- 0957US11372720B2Systems and methods for encoding metadataADVANCED MICRO DEVICES INC·Filed 2020·Granted Jun 28, 2022·0 cites·20 claims
- 1054US11734114B2Programmable error correction code encoding and decoding logicADVANCED MICRO DEVICES INC·Filed 2020·Granted Aug 22, 2023·0 cites·20 claims
- 1152US6990539B2Apparatus and method of implementing BREQ routing to allow functionality with 2 way or 4 way processorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jan 24, 2006·3 cites·39 claims
- 1252US5155828AComputing system with a cache memory and an additional look-aside cache memoryHEWLETT PACKARD CO·Filed 1991·Granted Oct 13, 1992·25 cites·13 claims
- 1344US8589670B2Adjusting system configuration for increased reliability based on marginLA FETRA ROSS V·Filed 2009·Granted Nov 19, 2013·0 cites·20 claims
- 1434US5029133AVLSI chip having improved test accessHEWLETT PACKARD CO·Filed 1990·Granted Jul 2, 1991·7 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →