Inventor · disambiguated record
Gavin B. Meil
Also filed as: MEIL GAVIN · MEIL GAVIN B · MEIL GAVIN BALFOUR
27 granted patents·85 citations·filing 2005–2021
95Inventor score
Technology areasG06F
Top patents by PatentIndex Score
27 records- 0195US9251304B2Circuit design evaluation with compact multi-waveform representationsIBM·Filed 2014·Granted Feb 2, 2016·17 cites·20 claims
- 0292US9916407B2Phase algebra for analysis of hierarchical designsIBM·Filed 2015·Granted Mar 13, 2018·9 cites·11 claims
- 0391US9798844B2Phase algebra for analysis of hierarchical designsIBM·Filed 2015·Granted Oct 24, 2017·7 cites·9 claims
- 0490US10216881B2Phase algebra for analysis of hierarchical designsIBM·Filed 2017·Granted Feb 26, 2019·6 cites·9 claims
- 0590US9223916B2Timing analysis of asynchronous clock domain crossingsIBM·Filed 2014·Granted Dec 29, 2015·20 cites·20 claims
- 0684US10331822B2Clock-gating phase algebra for clock analysisIBM·Filed 2015·Granted Jun 25, 2019·2 cites·10 claims
- 0784US10325041B2Circuit design analyzerIBM·Filed 2015·Granted Jun 18, 2019·2 cites·8 claims
- 0883US9547732B2Static checking of asynchronous clock domain crossingsIBM·Filed 2014·Granted Jan 17, 2017·3 cites·13 claims
- 0983US9268889B2Verification of asynchronous clock domain crossingsIBM·Filed 2014·Granted Feb 23, 2016·3 cites·20 claims
- 1079US10325040B2Conditional phase algebra for clock analysisIBM·Filed 2014·Granted Jun 18, 2019·2 cites·12 claims
- 1173US8244979B2System and method for cache-locking mechanism using translation table attributes for replacement class ID determinationBURNS ADAM PATRICK·Filed 2007·Granted Aug 14, 2012·8 cites·17 claims
- 1271US10990725B2Clock-gating phase algebra for clock analysisIBM·Filed 2019·Granted Apr 27, 2021·0 cites·16 claims
- 1367US10599792B2Circuit design analyzerIBM·Filed 2017·Granted Mar 24, 2020·0 cites·18 claims
- 1467US10552559B2Glitch-aware phase algebra for clock analysisIBM·Filed 2017·Granted Feb 4, 2020·0 cites·20 claims
- 1563US10515164B2Clock-gating phase algebra for clock analysisIBM·Filed 2014·Granted Dec 24, 2019·0 cites·10 claims
- 1663US9830412B2Glitch-aware phase algebra for clock analysisIBM·Filed 2014·Granted Nov 28, 2017·0 cites·12 claims
- 1762US10558782B2Phase algebra for virtual clock and mode extraction in hierarchical designsIBM·Filed 2019·Granted Feb 11, 2020·0 cites·20 claims
- 1862US10552558B2Conditional phase algebra for clock analysisIBM·Filed 2015·Granted Feb 4, 2020·0 cites·8 claims
- 1962US8407451B2Method and apparatus for enabling resource allocation identification at the instruction level in a processor systemMEIL GAVIN BALFOUR·Filed 2007·Granted Mar 26, 2013·4 cites·13 claims
- 2061US9536024B2Methods for static checking of asynchronous clock domain crossingsIBM·Filed 2015·Granted Jan 3, 2017·0 cites·7 claims
- 2154US8122410B2Specifying and validating untimed netsDILULLO JACK·Filed 2008·Granted Feb 21, 2012·2 cites·15 claims
- 2253US10318695B2Phase algebra for virtual clock and mode extraction in hierarchical designsIBM·Filed 2016·Granted Jun 11, 2019·0 cites·20 claims
- 2346US10503856B2Phase algebra for specifying clocks and modes in hierarchical designsIBM·Filed 2016·Granted Dec 10, 2019·0 cites·15 claims
- 2446US10031987B2Verification of untimed netsIBM·Filed 2016·Granted Jul 24, 2018·0 cites·20 claims
- 2546US7558921B2Method for data set replacement in 4-way or greater locking cacheIBM·Filed 2005·Granted Jul 7, 2009·0 cites·20 claims
- 2645US8099579B2System and method for cache-locking mechanism using segment table attributes for replacement class ID determinationBURNS ADAM PATRICK·Filed 2007·Granted Jan 17, 2012·0 cites·20 claims
- 2741US11907634B2Automating addition of power supply rails, fences, and level translators to a modular circuit designIBM·Filed 2021·Granted Feb 20, 2024·0 cites·25 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →