Inventor · disambiguated record
Joseph Tzou
Also filed as: TZOU JOSEPH · TZOU JOSEPH JENGTAO
24 granted patents·532 citations·filing 1990–2015
96Inventor score
Top patents by PatentIndex Score
24 records- 0191US5656861ASelf-aligning contact and interconnect structurePARADIGM TECHNOLOGY INC·Filed 1995·Granted Aug 12, 1997·134 cites·13 claims
- 0289US7142477B1Memory interface system and method for reducing cycle time of sequential read and write accesses using separate address and data busesCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Nov 28, 2006·54 cites·15 claims
- 0387US7728619B1Circuit and method for cascading programmable impedance matching in a multi-chip systemCYPRESS SEMICONDUCTOR CORP·Filed 2008·Granted Jun 1, 2010·17 cites·18 claims
- 0483US8527802B1Memory device data latency circuits and methodsCYPRESS SEMICONDUCTOR CORP·Filed 2012·Granted Sep 3, 2013·8 cites·18 claims
- 0580US7269772B1Method and apparatus for built-in self-test (BIST) of integrated circuit deviceCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Sep 11, 2007·23 cites·15 claims
- 0679US8149643B2Memory device and methodTZOU JOSEPH·Filed 2008·Granted Apr 3, 2012·12 cites·20 claims
- 0779US7684257B1Area efficient and fast static random access memory circuit and methodCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted Mar 23, 2010·12 cites·13 claims
- 0878US8705310B2Access methods and circuits for memory devices having multiple banksCYPRESS SEMICONDUCTOR CORP·Filed 2012·Granted Apr 22, 2014·5 cites·20 claims
- 0978US7146454B1Hiding refresh in 1T-SRAM architectureCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Dec 5, 2006·26 cites·24 claims
- 1076US9640237B1Access methods and circuits for memory devices having multiple channels and multiple banksCYPRESS SEMICONDUCTOR CORP·Filed 2015·Granted May 2, 2017·4 cites·20 claims
- 1175US7403446B1Single late-write for standard synchronous SRAMsCYPRESS SEMICONDUCTOR CORP·Filed 2005·Granted Jul 22, 2008·10 cites·15 claims
- 1274US5172211AHigh resistance polysilicon load resistorPARADIGM TECHNOLOGY INC·Filed 1990·Granted Dec 15, 1992·41 cites·21 claims
- 1372US5168076AMethod of fabricating a high resistance polysilicon load resistorPARADIGM TECHNOLOGY INC·Filed 1991·Granted Dec 1, 1992·36 cites·7 claims
- 1470US5483104ASelf-aligning contact and interconnect structurePARADIGM TECHNOLOGY INC·Filed 1992·Granted Jan 9, 1996·38 cites·10 claims
- 1567US8040164B2Circuits and methods for programming integrated circuit input and output impedancesCYPRESS SEMICONDUCTOR CORP·Filed 2008·Granted Oct 18, 2011·3 cites·16 claims
- 1666US8095747B2Memory system and methodBARBARA BRUCE·Filed 2008·Granted Jan 10, 2012·4 cites·18 claims
- 1766US5166771ASelf-aligning contact and interconnect structurePARADIGM TECHNOLOGY INC·Filed 1990·Granted Nov 24, 1992·35 cites·25 claims
- 1864US9666255B2Access methods and circuits for memory devices having multiple banksCYPRESS SEMICONDUCTOR CORP·Filed 2014·Granted May 30, 2017·2 cites·20 claims
- 1963US5620919AMethods for fabricating integrated circuits including openings to transistor regionsPARADIGM TECHNOLOGY INC·Filed 1995·Granted Apr 15, 1997·28 cites·1 claims
- 2060US7719908B1Memory having read disturb test modeCYPRESS SEMICONDUCTOR CORP·Filed 2007·Granted May 18, 2010·4 cites·18 claims
- 2157US7196925B1Memory array with current limiting device for preventing particle induced latch-upCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Mar 27, 2007·11 cites·20 claims
- 2255US5124774ACompact SRAM cell layoutPARADIGM TECHNOLOGY INC·Filed 1990·Granted Jun 23, 1992·25 cites·16 claims
- 2343US8358557B2Memory device and methodCYPRESS SEMICONDUCTOR CORP·Filed 2011·Granted Jan 22, 2013·0 cites·20 claims
- 2442US8873264B1Data forwarding circuits and methods for memory devices with write latencyCYPRESS SEMICONDUCTOR CORP·Filed 2013·Granted Oct 28, 2014·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →